• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.5
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• pp.217-223
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• 2004

In block-based lossy video compression, severe quantization causes discontinuities along block boundaries so that annoying blocking artifacts are visible in decoded video images. These blocking artifacts significantly decrease the subjective image quality. In order to reduce the blocking artifacts in decoded images, many algorithms have been proposed. However studies on so called comer outlier, have been very limited. Corner outliers make image edges look disconnected from those of neighboring blocks at cross block boundary. In order to solve this problem we propose a corner outlier detection and compensation algorithm as loop-filtering in spatial domain. Experiment results show that the proposed method provides much improved subjective image quality.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.359-360
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• 2009

홈 네트워크 구축의 핵심 부품인 전력선 통신용 블로킹 필터를 제조하였으며, 신호 감쇄 특성을 측정하고 적용가능성을 평가 하였다. 전자장 모의 해석을 통하여 자심재료에 대한 포화자속밀도 특성을 분석 하였으며, 최소의 크기를 갖는 I 형상의 자심재료에 $3.2\Phi$의 나동선을 10.5턴 권선하여 대용량 인덕터를 제조하고, $4.3\;{\mu}H$의 인덕턴스를 구현하였다. 설계된 대용량 인덕터를 적용하여 30A급의 블로킹 필터를 제조하였고, 1.7 MHz ~ 30 MHz 대역에서의 -60 dB의 신호감쇄 특성을 얻었다.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.8
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• pp.611-614
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• 2004

In this paper, we propose an adaptive blocking artifact reduction algorithm using characteristics of the block boundaries. Blocking artifacts contain the high frequency components near the block boundaries, so the lowpass filtering can remove them. But a simple lowpass filtering results into blurring by remove important features such as edges. To overcome this problem, we determine the modes depending on the characteristics around boundaries then proper filter is applied to each area. Simulation results show that the proposed method improves deblocking performance compared to that of MPEG-4.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.11a
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• pp.486-489
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• 1999

This paper deals with the design rule and performance results of the transient voltage blocking devices (TBD) for low-voltage mains on shipboard. The proposed TBD consists of metal oxide varistors (MOV) and L-C filter to improve noise-elimination performance. Three kinds of TBDs are fabricated and tested by using a combination surge generator which can produce the standard impulse current of 8/20${\mu}$s 2.1kA. As a reults, the proposed TBD with series L-C filter has more excellent transient blocking and noise reduction performance than the conventional TBDs.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.4
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• pp.227-233
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• 2006

In order to reduce blocking artifacts and improve compression efficiency, H.264/AVC standard employs an adaptive in-loop deblocking filter. This paper proposes a new hardware architecture of the deblocking filter that employs a four-stage pipelined structure with an efficient data distribution. The proposed architecture allows a simultaneous supply of eight data samples to fully utilize the pipelined filter in both horizontal and vertical filterings. This paper also presents a new filtering order and data reuse scheme between consecutive macroblock filterings to reduce the communication for external memory access. The number of required cycles for filtering one macroblock (MB) is 357 cycles when the proposed filter uses dual port SRAMs. This execution speed is only 41.3% of that of the fastest previous work.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.59-68
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• 2002

In this paper, we design the two-dimensional Discrete Wavelet Transform (2D DWT) filter that is widely used in various applications such as image compression because it has no blocking effects and relatively high compression rate. The filter that we used here is two-channel four-taps QMF(Quadrature Mirror Filter) Lattice filter with PR (Perfect Reconstruction) property. The proposed DWT architecture, with two consecutive inputs shows an efficient performance with a minimum of such hardware resources as multipliers, adders, and registers due to a simple scheduling. The proposed architecture was verified by the RTL simulation, and utilizes the hardware 100%. Our architecture shows a relatively high performance with a minimum hardware when compared with other approaches. An efficient memory mapping and address generation techniques are introduced and the fixed-point arithmetic analysis for minimizing the PSNR degradation due to quantization is discussed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.5
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• pp.452-459
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• 1992

In this paper, we have estimated voice traffics using Kalman-filtering for upcoming years and evaluated performance of a grid topology circuit switched network using above outcomes. Since measurement errors and modeling errors are considered in Kalman-filtering, the system is estimated more accurately than by using any other estimation methods. A grid topology circuit switched network has alternative routing paths, therefore it is more reliable than any other networks. In this paper, we have calculated the call blocking probabilities, which is the key measuremens of performance evaluation in circuit switched networks. by using estimated voice traffics for upcoming years.

• Journal of IKEEE
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• v.10 no.1 s.18
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• pp.49-54
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• 2006

Recently, e-mail has become an important way of communications in IT societies, but it creates various social problems due to increase of spam mails. Even though many organizations and cooperation have been trying researches to develop spam mail blocking technologies, a lot of cost and system complexities are required because of varieties of spam blocking technologies. In this paper, we designed of the SMBC(Spam Mail Blocking Center) using the Fit FA(Filtering Algorithm) Finder. Fit-FA Finder that search and applises spam mail filtering algorithm of the most suitable confrontation according to type of spam mail. The system of spam mail filtering is decided performance of the system by procedure that spam filter is used. Go through designed Fit-FA Finder and reduced unnecessary filtering process and processing time and load than appointment order filter application way of existent spam mail interception system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.20-27
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• 2010

This paper describes a design of 5-stage pipelined de-blocking filter with power reduction scheme and proposes a efficient memory architecture and filter order for high performance H.264/AVC Decoder. Generally the de-blocking filter removes block boundary artifacts and enhances image quality. Nevertheless filter has a few disadvantage that it requires a number of memory access and iterated operations because of filter operation for 4 time to one edge. So this paper proposes a optimized filter ordering and efficient hardware architecture for the reduction of memory access and total filter cycles. In proposed filter parallel processing is available because of structured 5-stage pipeline consisted of memory read, threshold decider, pre-calculation, filter operation and write back. Also it can reduce power consumption because it uses a clock gating scheme which disable unnecessary clock switching. Besides total number of filtering cycle is decreased by new filter order. The proposed filter is designed with Verilog-HDL and functionally verified with the whole H.264/AVC decoder using the Modelsim 6.2g simulator. Input vectors are QCIF images generated by JM9.4 standard encoder software. As a result of experiment, it shows that the filter can make about 20% total filter cycles reduction and it requires small transposition buffer size.

• Journal of Broadcast Engineering
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• v.7 no.4
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• pp.327-334
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• 2002

This paper addresses an efficient loop filter algorithm to improve visual quality by simultaneously reducing blocking and ringing artifacts in H.26L video coder. H.26L video coding standard using the different coding mechanism to existing video coding standards has different distribution of blocking and ringing artifacts that is dependent on coding type, quantization step size, and motion vector. Therefore, the information is used to define the filter type and the filter coefficients. and a projection operator is defined to avoid the over-smoothness. In addition, in order to avoid over-smoothing coming from filtering processing, a constraint projection operator is defined. Since the above information is available both in encoder and in the decoder, a loop filter is used, and the algorithm is simplified to reduce the computational cost. Experimental results show the capability of the proposed algorithm.