• Journal of the Korea institute for structural maintenance and inspection
• /
• v.24 no.5
• /
• pp.69-76
• /
• 2020

Global warming is a very important problem as it causes rapid climate change and natural disasters. Therefore, researches related to renewable energy are being actively conducted while promoting policies such as reducing carbon dioxide emission and increasing the proportion of renewable energy. Solar power generation is being applied in urban areas like BIPV as well as existing idle areas outside the city. Therefore, in this study, precast concrete blocks developed for paving roadways capable of solar power generation were designed and constructed. For the evaluation of field applicability for 6 months, skid resistance and block settlement were measured. As a result of the experiment, it was found that skid resistance satisfies the standard of general roadway in Korea, but not the standard of highway. The skid resistance tended to decrease as time passed. In addition, the settlement of the block gradually increased slightly, but it is much smaller than the allowable settlement of the roadway. Therefore, it is necessary to establish a maintenance period and method based on the periodic measurement results in the future.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.35C no.11
• /
• pp.21-30
• /
• 1998

In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.12A
• /
• pp.925-932
• /
• 2009

Precise temperature monitoring is the major preconditioning to supervise quality losses within the transport chain for fresh products. ISO/IEC18000-6REV1 defines new protocols supporting BAP(Battery Assisted Passive) RFID tag which is completely compatible with EPCglobal Class1 Generation2 specification. In this paper, we designed a modem supporting BAP RFID tag with FPGA(Field Programmable Gate Array) and implemented sensor data processing function defined in ISO/IEC18000-6REV1. The transmit block of the modem supports pulse shaping filter and the output signal of the implemented RFID reader is satisfied with the spectrum mask defined in the standard. The receive block of the modem uses Gardner TED to synchronize timing of symbol. In this paper, we designed a modem supporting ISO/IEC18000-6REV1 standard and developed a RFID reader sndard. The developed RFID reader sndard can recognize sensor tag and passive tag in the wireless environment and supports real-time processing of the sensor data in the embedded linux platform.

• Journal of the Korean Society of Propulsion Engineers
• /
• v.16 no.5
• /
• pp.97-107
• /
• 2012

In general, solid propulsion offers cost effective, large thrust capabilities comparing to the liquid propulsion which offers high specific impulse and restart capabilities. Therefore, solid propulsion is well fitted for the first stage and boosters. Building Block Launcher(BBL) approach has been studied for the launch vehicle because of cost effectiveness, limited development time and low risk. Using of the carbon fiber epoxy resin in the solid rocket motor case is expanded, and specially high strength fibers are more attracted since its inert mass reduction.

• Journal of the Society of Naval Architects of Korea
• /
• v.44 no.1 s.151
• /
• pp.8-15
• /
• 2007

In this paper, numerical calculations are performed to analyze the unsteady flow of NACA airfoil sections. In order to ease the flow computation for the fluid region changing in time, improve the quality of solution and simplify the grid generation for the oscillating foil flow, the computational method adopts a moving and deforming mesh with the multi-block grid topology. The multi-block, structured-unstructured hybrid grid is generated using the commercial meshing software Gridgen V15. The MDM (Moving & Deforming Mesh) and the UDF (User Define function) function of FLUENT 6 are adopted for computing turbulent flows of the foil in pitching motion. Computed unsteady lift and drag forces are compared with experimental data. in general, the characteristics of unsteady lift and drag of the experiments are reproduced well in the numerical analysis.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.14 no.8
• /
• pp.3976-3982
• /
• 2013

This paper presents a temperature analysis of the chaotic behavior in the voltage controlled CMOS chaotic circuit. The circuit is based on a simple nonlinear function block which is needed for chaotic signal generation. It consists of a NFB (nonlinear function block), a level shifter and non-overlapping two-phase clock for sample and hold. By SPICE simulation, chaotic dynamics such as frequency spectra and bifurcations according to the temperature variations were analyzed. And, it was showed that the circuit can generate discrete chaotic signals within control voltage in the range from 1.2 V to 2.3 V in a specific temperature condition of $25^{\circ}C$.

• Advances in Energy Research
• /
• v.4 no.1
• /
• pp.29-45
• /
• 2016

There has been a growing interest in the recent time for the development of solar power tower plants, which are mainly used for utility scale power generation. Combined heat and power (CHP) is an efficient and clean approach to generate electric power and useful thermal energy from a single heat source. The waste heat from the topping Brayton cycle is utilized in the bottoming HRSG cycle for driving steam turbine and also to produce process steam so that efficiency of the cycle is increased. A thermal storage system is likely to add greater reliability to such plants, providing power even during non-peak sunshine hours. This paper presents a conceptual configuration of a solar power tower combined heat and power plant with a topping air Brayton cycle. A simple downstream Rankine cycle with a heat recovery steam generator (HRSG) and a process heater have been considered for integration with the solar Brayton cycle. The conventional GT combustion chamber is replaced with a solar receiver. The combined cycle has been analyzed using energy as well as exergy methods for a range of pressure ratio across the GT block. From the thermodynamic analysis, it is found that such an integrated system would give a maximum total power (2.37 MW) at a much lower pressure ratio (5) with an overall efficiency exceeding 27%. The solar receiver and heliostats are the main components responsible for exergy destruction. However, exergetic performance of the components is found to improve at higher pressure ratio of the GT block.

• The KIPS Transactions:PartB
• /
• v.9B no.6
• /
• pp.745-752
• /
• 2002

The purpose of the paper is to enable a format transcoding between a heterogeneous compression format in a real time, and to enhance the compression ratio using characteristics of the compressed frame. In this paper, for the heterogeneous format transcoding, we tried to transcode from MPEG2 having a lower compression ratio to H.263 having a higher compression ratio. After analyzing MPEG 2 bit stream and H.263 bit stream of the same original video, we found that the number of intra coded macro blocks in MPEG 2 data is much higher than the number of the intra coded macro blocks in H.263 data. In the process of P frame generation, a intra coded macro block is generated when a motion estimation value representing the similarity between the previous frame and current frame does not meet a threshold. Especially the intra coded macro block has a great impact on the compression ratio. Hence the paper, we tried to minimize the number of intra coded macro blocks in H.263 data stream which is transcoded from MPEG 2 in a compressed domain. For the purpose, we propose a guided search method for transcoding the INTRA coded block into INTER coded block using the information about motion vectors surrounding the intra macro block in order to minimize the complexity of the motion estimation process. The experimental results show that the transcoding of MPEG 2 into H.263 can be done in a real time successfully.

• ETRI Journal
• /
• v.38 no.3
• /
• pp.455-462
• /
• 2016

Frequency hopping (FH) is a common characteristic of a wide variety of communication systems. On the other hand, software-defined radio (SDR) is an increasingly utilized technology for implementing modern communication systems. The main challenge when trying to realize an SDR FH system is the frequency tuning time, that is, the higher the hopping rate, the lower the required frequency tuning time. In this paper, significant universal hardware driver tuning options (within GNU Radio software) are investigated to discover the tuning option that gives the minimum frequency tuning time. This paper proposes an improved SDR frequency tuning algorithm for the generation of a target signal (with a given target frequency). The proposed algorithm aims to improve the frequency tuning time without any frequency deviation, thus allowing the realization of modern communication systems with higher FH rates. Moreover, it presents the design and implementation of an original GNU Radio Companion block that utilizes the proposed algorithm. The target SDR platform is that of the Universal Software Radio Peripheral USRP-N210 paired with the RFX2400 daughter board. Our results show that the proposed algorithm achieves higher hopping rates of up to 5,000 hops/second.

• Journal of the Society of Naval Architects of Korea
• /
• v.44 no.1 s.151
• /
• pp.16-25
• /
• 2007

Studies of unsteady-airfoil flows have been motivated mostly by efforts to avoid. or reduce such undesirable effects as flutter, noise and vibrations, dynamic stall. In this paper, we carry out a computational study of viscous flows around a two-dimensional oscillating airfoil to investigate unsteady effects in these important and challenging flows. A fully implicit incompressible RANS solver has been used for calculating unsteady viscous flows around an airfoil. The cell-centered End order finite volume method is utilized to discretize governing equations. in order to ease the flow computation for fluid region changing in time, improve the qualify of solution and simplify the grid generation for an oscillating airfoil flow, the computational method adopts a moving and deforming grid generation technique based on the multi-block grid topology. The numerical method is applied for calculating viscous flows of an oscillating NACA 0012 in uniform flow. The computational results are compared with available experimental data. Computed results are compared with experimental data and flow characteristics of the experiment are reproduced well In the computed results.