• Title/Summary/Keyword: Block Algorithms

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AMSEA: Advanced Multi-level Successive Elimination Algorithms for Motion Estimation (움직임 추정을 위한 개선된 다단계 연속 제거 알고리즘)

  • Jung, Soo-Mok;Park, Myong-Soon
    • Journal of KIISE:Software and Applications
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    • v.29 no.1_2
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    • pp.98-113
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    • 2002
  • In this paper, we present advanced algorithms to reduce the computations of block matching algorithms for motion estimation in video coding. Advanced multi-level successive elimination algorithms(AMSEA) are based on the Multi-level successive elimination algorithm(MSEA)[1]. The first algorithm is that when we calculate the sum of absolute difference (SAD) between the sum norms of sub-blocks in MSEA, we use the partial distortion elimination technique. By using the first algorithm, we can reduce the computations of MSEA further. In the second algorithm, we calculate SAD adaptively from large value to small value according to the absolute difference values between pixels of blocks. By using the second algorithm, the partial distortion elimination in SAD calculation can occur early. So, the computations of MSEA can be reduced. In the third algorithm, we can estimate the elimination level of MSEA. Accordingly, the computations of the MSEA related to the level lower than the estimated level can be reduced. The fourth algorithm is a very fast block matching algorithm with nearly 100% motion estimation accuracy. Experimental results show that AMSEA are very efficient algorithms for the estimation of motion vectors.

조선 도장 공장 운영 방안 수립에 관한 연구

  • 최동희;박주철
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2001.10a
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    • pp.286-289
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    • 2001
  • This paper deals with the procedures of effective mid-term Operation Planning establishment for painting shop in shipbuilding. and develop prototype system. In general, the block painting process consists of two stages such as blasting operation for surface preparation and painting operation for paint application for blocks. Weather condition is a potent Influence on those operations. The procedures consists of four steps, Load analysis, Generate alternative simulation plan. Implementation of Allocation automation module and Compare result of each simulation plan. Explain of each step. as follows, 1.step, Load analysis measure amount of assigned workload and manhour. 2.step, simulation scheme include alterable control variable such as overtime, weather. Auto allocating module carry out feasibility of simulation plan. 3.step, Allocation automation module are composed of three algorithms, as followings: - the block allocation algorithm that determines the number of blocks to be processed each day, - the team allocation algorithm that allocates blocks to worker groups. - the block arrangement algorithm that arrange blocks in blasting and painting cells. Since the block arrangement algorithm is conducted simultaneously with the team allocation algorithm, the total structure of the operating algorithms is considered to have two phases: first, daily load balancing with capacity limit and second, team allocation considering arrangement each day 4 step, Comparing result of each simulation plan. and select best simulation plan.

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A Study on the New BC-ABBM Motion Estimation Algorithm for Low Bit Rate Video Coding (저 전송률 비디오 압축을 위한 새로운 BC-ABBM 움직임 추정 알고리즘에 관한 연구)

  • 이완범;김환용
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.7C
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    • pp.946-953
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    • 2004
  • Fast search and conventional boolean matching motion estimation algorithms reduce computational complexity and data processing time but this algorithms have disadvantages that is difficult of implementation of hardware because of high control overhead and that is less performance than Full search Algorithm(FA). This paper present new all binary block matching algorithm, called Bit Converted All Binary Block Matching(BC-ABBM). Proposed algorithm have performance closed to the FA by boolean only block matching that may be very efficiently implemented in hardware for low bit rate video communication. Simulation results show that the PSNR of the proposed algorithm is about 0.04dB loss than FA but is about 0.6 ∼ 1.4dB gain than fast search algorithm and conventional boolean matching algorithm.

Implementation of Image Enhancement Filter System Using Genetic Algorithm (유전자 알고리즘을 이용한 영상개선 필터 시스템 구현)

  • Gu, Ji-Hun;Dong, Seong-Su;Lee, Jong-Ho
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.51 no.8
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    • pp.360-367
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    • 2002
  • In this paper, genetic algorithm based adaptive image enhancement filtering scheme is proposed and Implemented on FPGA board. Conventional filtering methods require a priori noise information for image enhancement. In general, if a priori information of noise is not available, heuristic intuition or time consuming recursive calculations are required for image enhancement. Contrary to the conventional filtering methods, the proposed filter system can find optimal combination of filters as well as their sequent order and parameter values adaptively to unknown noise types using structured genetic algorithms. The proposed image enhancement filter system is mainly composed of two blocks. The first block consists of genetic algorithm part and fitness evaluation part. And the second block consists of four types of filters. The first block (genetic algorithms and fitness evaluation blocks) is implemented on host computer using C code, and the second block is implemented on re-configurabe FPGA board. For gray scale control, smoothing and deblurring, four types of filters(median filter, histogram equalization filter, local enhancement filter, and 2D FIR filter) are implemented on FPGA. For evaluation, three types of noises are used and experimental results show that the Proposed scheme can generate optimal set of filters adaptively without a pioi noise information.

A Rapid Locating Protocol of Corrupted Data for Cloud Data Storage

  • Xu, Guangwei;Yang, Yanbin;Yan, Cairong;Gan, Yanglan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.10 no.10
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    • pp.4703-4723
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    • 2016
  • The verification of data integrity is an urgent topic in remote data storage environments with the wide deployment of cloud data storage services. Many traditional verification algorithms focus on the block-oriented verification to resolve the dispute of dynamic data integrity between the data owners and the storage service providers. However, these algorithms scarcely pay attention to the data verification charge and the users' verification experience. The users more concern about the availability of accessed files rather than data blocks. Moreover, the data verification charge limits the number of checked data in each verification. Therefore, we propose a mixed verification protocol to verify the data integrity, which rapidly locates the corrupted files by the file-oriented verification, and then identifies the corrupted blocks in these files by the block-oriented verification. Theoretical analysis and simulation results demonstrate that the protocol reduces the cost of the metadata computation and transmission relative to the traditional block-oriented verification at the expense of little cost of additional file-oriented metadata computation and storage at the data owner. Both the opportunity of data extracted and the scope of suspicious data are optimized to improve the verification efficiency under the same verification cost.

Computationally-Efficient Algorithms for Multiuser Detection in Short Code Wideband CDMA TDD Systems

  • De, Parthapratim
    • Journal of Communications and Networks
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    • v.18 no.1
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    • pp.27-39
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    • 2016
  • This paper derives and analyzes a novel block fast Fourier transform (FFT) based joint detection algorithm. The paper compares the performance and complexity of the novel block-FFT based joint detector to that of the Cholesky based joint detector and single user detection algorithms. The novel algorithm can operate at chip rate sampling, as well as higher sampling rates. For the performance/complexity analysis, the time division duplex (TDD) mode of a wideband code division multiplex access (WCDMA) is considered. The results indicate that the performance of the fast FFT based joint detector is comparable to that of the Cholesky based joint detector, and much superior to that of single user detection algorithms. On the other hand, the complexity of the fast FFT based joint detector is significantly lower than that of the Cholesky based joint detector and less than that of the single user detection algorithms. For the Cholesky based joint detector, the approximate Cholesky decomposition is applied. Moreover, the novel method can also be applied to any generic multiple-input-multiple-output (MIMO) system.

Modeling cryptographic algorithms validation and developing block ciphers with electronic code book for a control system at nuclear power plants

  • JunYoung Son;Taewoo Tak;Hahm Inhye
    • Nuclear Engineering and Technology
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    • v.55 no.1
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    • pp.25-36
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    • 2023
  • Nuclear power plants have recognized the importance of nuclear cybersecurity. Based on regulatory guidelines and security-related standards issued by regulatory agencies around the world including IAEA, NRC, and KINAC, nuclear operating organizations and related systems manufacturing organizations, design companies, and regulatory agencies are considering methods to prepare for nuclear cybersecurity. Cryptographic algorithms have to be developed and applied in order to meet nuclear cybersecurity requirements. This paper presents methodologies for validating cryptographic algorithms that should be continuously applied at the critical control system of I&C in NPPs. Through the proposed schemes, validation programs are developed in the PLC, which is a critical system of a NPP's I&C, and the validation program is verified through simulation results. Since the development of a cryptographic algorithm validation program for critical digital systems of NPPs has not been carried out, the methodologies proposed in this paper could provide guidelines for Cryptographic Module Validation Modeling for Control Systems in NPPs. In particular, among several CMVP, specific testing techniques for ECB mode-based block ciphers are introduced with program codes and validation models.

Subblock Based Temporal Error Concealment of Intra Frame for MPEG-2 (서브 블록을 이용한 MPEG-2 인트라 프레임의 시간적 오류 은닉)

  • Ryu, Chul;Kim, Won-Rak
    • Proceedings of the KIEE Conference
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    • 2005.05a
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    • pp.167-169
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    • 2005
  • The occurrence of a single bit error in transmission bitstream leads to serious temporal and spatial errors. Because moving picture coding as MPEG-2 based on block coding algorithm uses variable length coding and motion compensation coding algorithm. In this paper, we propose algorithm to conceal occurred error of I-frames in transmission channel using data of the neighboring blocks in decoder. We divide a damaged macroblock of I-frame into four sub blocks and compose new macroblock using the neighboring blocks for each sub block. We estimate the block with minimum difference value through block matching with previous frame for new macroblocks and replace each estimated block with damaged sub block in the same position. Through simulation results, the proposed algorithm will be applied to a characteristic of moving with effect and shows better performance than conventional error concealment algorithms from visual and PSNR of view.

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Generating Local Addresses for Block-Cyclic Distributed Array (블록-순환으로 분배된 배열의 지역 주소 생성)

  • Kwon, Oh-Young;Kim, Tae-Geun;Han, Tack-Don;Yang, Sung-Bong;Kim, Shin-Dug
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.11
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    • pp.2835-2844
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    • 1998
  • Most data parallel languages provide the block-cyclic distribution (cyclic(k)) that is one of the most general regular distributions. In order to generate local addresses for an array section A(l:h:s) with block-cyclic distribution, efficient compiling methods or run-time methods are required. In this paper, two local address generation methods for the block-cyclic distribution are presented. One is a simple scan method that is modified from the virtual-block scheme. The other is a linear-time ${\Delta}M$ table that contains the local memory access information construction method. This method is simpler than other algorithms for generating a ${\Delta}M$ table. Experimental results show that a simple that a simple scan method has poor performance but a linear-time ${\Delta}M$ table generation method is faster than other algorithms in ${\Delta}M$ table generation time and access time for 10,000 array elements.

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Post-Processing for Reducing Corner Outliers (Corner outlier 제거를 위한 후처리 기법)

  • 홍윤표;전병우
    • Proceedings of the IEEK Conference
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    • 2003.11a
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    • pp.11-14
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    • 2003
  • In block-based lossy video compression, severe quantization causes discontinuities along block boundaries so that annoying blocking artifacts are visible in decoded video imases. These blocking artifacts significantly decrease the subjective image quality. In order to reduce the blocking artifacts in decoded images, many algorithms have been proposed However studies on so called, corner outliers, have been very limited. Corner outliers make image edges look disconnected from those of neighboring blocks at cross block boundary. In order to solve this problem, we propose a corner outlier detection and compensation algorithm as post-processing in spatial domain The experiment results show that the proposed method provides much improved subjective image quality.

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