• Journal of KIISE:Information Networking
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• v.37 no.3
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• pp.175-186
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• 2010

Due to the emergence of new application programs and the fast growth of Internet users, Internet routers are required to provide the quality of services according to the class of input packets, which is identified by wire-speed packet classification. For a pre-defined rule set, by performing multi-dimensional search using various header fields of an input packet, packet classification determines the highest priority rule matching to the input packet. Efficient packet classification algorithms have been widely studied. Tuple pruning algorithm provides fast classification performance using hash-based search against the candidate tuples that may include matching rules. Bloom filter is an efficient data structure composed of a bit vector which represents the membership information of each element included in a given set. It is used as a pre-filter determining whether a specific input is a member of a set or not. This paper proposes new tuple pruning algorithms using Bloom filters, which effectively remove unnecessary tuples which do not include matching rules. Using the database known to be similar to actual rule sets used in Internet routers, simulation results show that the proposed tuple pruning algorithm provides faster packet classification as well as consumes smaller memory amount compared with the previous tuple pruning algorithm.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.10
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• pp.82-94
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• 2015

In this paper, we propose hardware prefetch mechanism with an efficient cache replacement policy by giving priority to the trigger block in which a spatial region and producing a spatial region by using the displacement field. It could be taken into account the sequence of the program since a history is based on the trigger block of history record, and it could be quickly prefetching the instructions or data address by adding a stored value to the trigger address and displacement field since a history is stored as a displacement value. Also, we proposed a method of replacing at random by the cache replacement policy from the low priority block when the cache area is full after giving priority to the trigger block. We analyzed using the memory simulator program gem5 and PARSEC benchmark to assess the performance of the hardware prefetcher. As a result, compared to the existing hardware prefecture to generate the spatial region using a bit vector, L1 data cache miss rate was reduced about 44.5% on average and an average of 26.1% of L1 instruction misses occur. In addition, IPC (Instruction Per Cycle) showed an improvement of about 23.7% on average.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.9C
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• pp.868-875
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• 2003

In this paper, enhanced multiresolution motion estimation(MRME) using reduction of one-pixel shift in wavelet domain is proposed. Conventional multiresolution motion estimation using hierarchical relationship of wavelet coefficient has difficulty for accurate motion estimation due to shift-variant property by decimation process of the wavelet transform. Therefore, to overcome shift-variant property of wavelet coefficient, two level wavelet transform is performed. In order too reduce one-pixel shift on low band signal, S$_4$ band is interpolated by inserting average value. Secondly, one level wavelet transform is applied to the interpolated S$_4$ band. To estimate initial motion vector, block matching algorithm is applied to low band signal S$_{8}$. Multiresolution motion estimation is performed at the rest subbands in low level. According to the experimental results, proposed method showed 1-2dB improvement of PSNR performance at the same bit rate as well as subjective quality compared with the conventional multiresolution motion estimation(MRME) methods and full-search block matching in wavelet domain.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.1
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• pp.13-20
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• 2004

In this paper, we have analyzed the current MPEG-4 video encoding tools and proposed efcient coding techniques that reduce the complexity of the encoder. Until recently, encoder optimization without shape coding has been a major concern in video for wire/wireless low bit rate coding services. Recently, we found out that the computational complexity of MPEG-4 shape coding plays a very important role in the object-based coding through experiments. We have made an experiment whether we could get optimized object-based coding method through successfully combining latest optimized texture coding techniques with our proposed optimized shape coding techniques. In texture coding, we applied the MVFAST method for motion estimation. We chose not to use IVOPF(Intelligent VOP Formation) but to use TRB(Tightest Rectangular Boundary) for positioning VOP and, finally, to eliminate the spiral search of shape motion estimation to reduce the complexity in shape coding. As a result of experiment, our proposed scheme achieved improved time complexity over the existing reference software by $57.3\%$ and over the optimized method on which only shape coding was applied by $48.7\%$, respectively.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.1
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• pp.83-90
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• 2010

Cancelable biometrics is a robust and secure biometric recognition method using revocable biometric template in order to prevent possible compromisation of the original biometric data. In this paper, we present a new cancelable bits extraction method for the facial data. We use our previous cancelable feature template for the bits extraction. The adopted cancelable template is generated from two different original face feature vectors extracted from two different appearance-based approaches. Each element of feature vectors is re-ordered, and the scrambled features are added. With the added feature, biometric bits string is extracted using helper data based method. In this technique, helper data is generated using statistical property of the added feature vector, which can be easily replaced with straightforward revocation. Because, the helper data only utilizes partial information of the added feature, our proposed method is a more secure method than our previous one. The proposed method utilizes the helper data to reduce feature variance within the same individual and increase the distinctiveness of bit strings of different individuals for good recognition performance. For a security evaluation of our proposed method, a scenario in which the system is compromised by an adversary is also considered. In our experiments, we analyze the proposed method with respect to performance and security using the extended YALEB face database

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.4
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• pp.362-370
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• 2001

In this paper, we proposed multispectral image compression method using CIP (classified inter-channel prediction) and SVQ (selective vector quantization) in wavelet domain. First, multispectral image is wavelet transformed and classified into one of three classes considering reflection characteristics of the subband with the lowest resolution. Then, for a reference channel which has the highest correlation and the same resolution with other channels, the variable VQ is performed in the classified intra-channel to remove spatial redundancy. For other channels, the CIP is performed to remove spectral redundancy. Finally, the prediction error is reduced by performing SVQ. Experiments are carried out on a multispectral image. The results show that the proposed method reduce the bit rate at higher reconstructed image quality and improve the compression efficiency compared to conventional methods. Index Terms-Multispectral image compression, wavelet transform, classfied inter-channel prediction, selective vetor quantization, subband with lowest resolution.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.53-60
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• 2009

Motion estimation for H.264/AVC video CODEC is very complex and requires a huge amount of computational efforts because it uses multiple reference frames and variable block sizes. We propose the architecture of high-performance integer-pixel motion estimation circuit based on fast algorithms for multiple reference frame selection, block matching, block mode decision and motion vector estimation. We also propose the architecture of high-performance interpolation circuit for sub-pixel motion estimation. We described the RTL circuit in Verilog HDL and synthesized the gate-level circuit using 130nm standard cell library. The integer-pixel motion estimation circuit consists of 77,600 logic gates and four $32\times8\times32$-bit dual-port SRAM's. It has tile maximum operating frequency of 161MHz and can process up to 51 D1 (720$\times$480) color in go frames per second. The fractional motion estimation circuit consists of 22,478 logic gates. It has the maximum operating frequency of 200MHz and can process up to 69 1080HD (1,920$\times$1,088) color image frames per second.

• The Journal of the Acoustical Society of Korea
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• v.22 no.1
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• pp.1-6
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• 2003

This paper analyses the performance of either the minimum variance distortionless response (MVDR) or the recursive least square (RLS) beamformer structured on the systolic array. Provided that the snapshot vector including the desired user's signal and the interferences with the noise is received at the array antenna. In order to improve the quality of received signal, MVDR or RLS algorithm can be utilized to update the beamformer weights recursively. Furthermore to increase the channel capacity, by the usage of the above schemes, the effect of the spatial filtering can be obtained which constructively combining multipath components corresponding to the desired user whereas the multiple access interferences (MAI) is nulled out on spatial domain. This paper introduces the MVDR and RLS beamformer structured on systolic array conducting the spatial filtering, and its performance under the multipath fading channel in the presence of multiple access interferences will be analyzed. To show the superior spatial filtering performances of the proposed scheme employing the systolic way structured beamformer, the computer simulations are carried out. And the validity of practical deployment of the proposed scheme will be confirmed throughout showing the BER behaviors and the beampatterns.

• Journal of Plant Biotechnology
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• v.36 no.1
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• pp.87-95
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• 2009

The recombinant DNAs, pGBF, pGTF, and pZ4F, using soybean ferritin gene have constructed with the promoters derived from seed proteins, glutelin, globulin, and zein. The recombinant ferritin genes were transformed into rice plant by Agrobacterium-mediated transformation. Iron contents and agronomic traits have been evaluated in the transgenic progenies. The embryogenic calli survived from second selection medium were regenerated at the rates of 19.2% with pGBF, 15.0% with pGTF, and 18.4% with pZ4F in Donganbyeo and 6.7% with pGBF, 11.7% with pGTF, and 3.4% with pZ4F in Hwashinbyeo. The introduction of ferritin gene in putative transgenic rice plants was confirmed by PCR and Southern blot analysis and also the expression of ferritin gene was identified by Northern blot and Western blot analysis. The iron accumulation in transgenic rice grains of the transgenic rice plant, T1-2, with zein promoter and ferritin gene contained 171.4 ppm showing 6.4 times higher than 26.7 ppm of Hwashinbyeo seed as wild type rice, but the transgenic plants with globulin and glutelin showed a bit higher iron contents with a range from 2.1 to 3.0 times compare to wild type grain. The growth responses of transgenic plants showed the large variances in plant height and number of tillers. However, there were some transgenic plants having similar phenotype to wild type plants. In the T1 generation of transgenic plants, plant height, culm length, panicle length, and number of tillers were similar to those of wild type plants, but ripened grain ratio ranged from 53.3% to 82.2% with relatively high variation. The transgenic rice plants would be useful for developing rice varieties with high iron content in rice grains.