• Title/Summary/Keyword: Bit By Bit

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Enhanced bit-by-bit binary tree Algorithm in Ubiquitous ID System (Ubiquitous ID 시스템에서의 Enhanced bit-by-bit 이진 트리 알고리즘)

  • 최호승;김재현
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.8
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    • pp.55-62
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    • 2004
  • This paper proposes and analyzes two anti-collision algorithms in Ubiquitous ID system. We mathematically compares the performance of the proposed algorithms with that of binary search algorithm slotted binary tree algorithm using time slot, and bit-by-bit binary tree algorithm proposed by Auto-ID center. We also validated analytic results using OPNET simulation. Based on analytic result comparing the proposed Modified bit-by-bit binary tree algorithm with bit-by-bit binary tree algorithm which is the best of existing algorithms, the performance of Modified bit-by-bit binary tree algorithm is about 5% higher when the number of tags is 20, and 100% higher when the number of tags is 200. Furthermore, the performance of proposed Enhanced bit-by-bit binary tree algorithm is about 335% and 145% higher than Modified bit-by-bit binary tree algorithm for 20 and 200 tags respectively.

Performance Analysis of Tag Identification Algorithm in RFID System (RFID 시스템에서의 태그 인식 알고리즘 성능분석)

  • Choi Ho-Seung;Kim Jae-Hyun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.5 s.335
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    • pp.47-54
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    • 2005
  • This paper proposes and analyzes a Tag Anti-collision algorithm in RFID system. We mathematically compare the performance of the proposed algorithm with existing binary algorithms(binary search algorithm, slotted binary tree algorithm using time slot, and bit-by-bit binary tree algorithm proposed by Auto-ID center). We also validated analytic results using OPNET simulation. Based on analytic result, comparing the proposed Improved bit-by-bit binary tree algerian with bit-by-bit binary tree algorithm which is the best of existing algorithms, the performance of Improved bit-by-bit binary tree algorithm is about $304\%$ higher when the number of tags is 20, and $839\%$ higher when the number of tags is 200.

A Stack Bit-by-Bit Algorithm for RFID Multi-Tag Identification (RFID 다중 태그 인식을 위한 스택 Bit-By-Bit 알고리즘)

  • Lee, Jae-Ku;Yoo, Dae-Suk;Choi, Seung-Sik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.8A
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    • pp.847-857
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    • 2007
  • For the implementation of a RFID system, an anti-collision algorithm is required to identify multiple tags within the range of a RFID Reader. A Bit-by-Bit algorithm is defined by Auto ID Class 0. In this paper, we propose a SBBB(Stack Bit-by-Bit) algorithm. The SBBB algorithm save the collision position and makes a query using the saved data. SBBB improve the efficiency of collision resolution. We show the performance of the SBBB algorithm by simulation. The performance of the proposed algorithm is higher than that of BBB algorithm. Especially, the more each tag bit streams are the duplicate, the higher performance is.

The noise impacts of the open bit line and noise improvement technique for DRAM (DRAM에서 open bit line의 데이터 패턴에 따른 노이즈(noise) 영향 및 개선기법)

  • Lee, Joong-Ho
    • Journal of IKEEE
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    • v.17 no.3
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    • pp.260-266
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    • 2013
  • The open bit line is vulnerable to noise compared to the folded bit line when read/write for the DRAM. According to the increasing DRAM densities, the core circuit operating conditions is exacerbated by the noise when it comes to the open bit line 6F2(F : Feature Size) structure. In this paper, the interference effects were analyzed by the data patterns between the bit line by experiments. It was beyond the scope of existing research. 68nm Tech. 1Gb DDR2, Advan Tester used in the experiments. The noise effects appears the degrade of internal operation margin of DRAM. This paper investigates sense amplifier power line splits by experiments. The noise can be improved by 0.2ns(1.3%)~1.9ns(12.7%), when the sense amplifier power lines split. It was simulated by 68nm Technology 1Gb DDR2 modeling.

Built-In-Test Coverage Analysis Considering Failure Mode of Electronics Components (전자부품 고장모드를 고려한 Built-In-Test 성능분석)

  • Seo, Joon-Ho;Ko, Jin-Young;Park, Han-Joon
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.43 no.5
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    • pp.449-455
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    • 2015
  • Built-In-Test(hereafter: BIT) is necessary functionality for aircraft flight safety and it requires a high failure detection capacity of more than 95 % in the case of avionics equipment. The BIT coverage analysis is needed to make sure that BIT meets its fault diagnosis capability. FMECA is used a lot of for the BIT coverage analysis. However, in this paper, the BIT coverage analysis based on electronic components is introduced to minimize the analytical error. Further, by applying the failure mode of the electronic components and excluding electronic components that do not affect flight safety, the BIT coverage analysis can be more accurate. Finally, BIT demo was performed and it was confirmed that the performance of the actual BIT matches the analysis of BIT performance.

A Study on the Data Acquisition by Bit Conversion Method (비트변환방식을 이용한 데이터 취득에 관한 연구)

  • 박상길
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.22 no.1
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    • pp.34-40
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    • 1986
  • This paper deals with a new bit conversion method. When 12 bit AID converter is adapted to 16 bit micro-computer, complicated data aquisition method is not necessary to acquire the AID converted data into memory of computer. However, when the 12 bit AID converter is adapted to the 8 bit micro-computer 12 bit data should be divided into 4 bit data and 8 bit data. Therefore the old data-dividing method made 4 bitl2byte of memory space wasted. On the contrary, using the new bit conversion method suggested in this paper the two of 12 bit data are converted into 3 byte of data without extending the AID conversion time.

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The Mutual Information for Bit-Linear Linear-Dispersion Codes (BLLD 부호의 Mutual Information)

  • Jin, Xiang-Lan;Yang, Jae-Dong;Song, Kyoung-Young;No, Jong-Seon;Shin, Dong-Joon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.10A
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    • pp.958-964
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    • 2007
  • In this paper, we derive the relationship between the bit error probability (BEP) of maximum a posteriori (MAP) bit detection and the bit minimum mean square error (MMSE), that is, the BEP is greater than a quarter of the bit USE and less than a half of the bit MMSE. By using this result, the lower and upper bounds of the derivative of the mutual information are derived from the BEP and the lower and upper bounds are easily obtained in the multiple-input multiple-output (MIMO) communication systems with the bit-linear linear-dispersion (BLLD) codes in the Gaussian channel.

A Stack Bit-by-Bit Algorithm for RFID Multi-Tag identification (RFID 다중 태그 인식을 위한 STACK Bit-by-Bit 알고리즘)

  • Lee, Jae-Ku;Yoo, Dea-Suk;Choi, Jae-Won;Choi, Seung-Sik
    • Proceedings of the Korea Information Processing Society Conference
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    • 2007.05a
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    • pp.795-798
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    • 2007
  • RFID 리더기가 영역내의 다수의 태그를 인식하기 위해선 충돌방지 알고리즘이 필수적으로 요구된다. 본 논문은 Auto ID Class 0에서 정의한 충돌방지 알고리즘인 Bit-by-Bit 이진트리 알고리즘(BBB)의 충돌 위치를 스택에 저장하고 이를 통해 다음 질의어를 결정함으로써 성능이 크게 개선된 Stack-bit-by-bit(SBBB) 알고리즘을 제안한다. 시뮬레이션을 통한 검증결과 질의-응답 횟수, 질의어의 크기, 응답어의 크기의 모든 면에서 성능이 개선된 것을 확인할 수 있었다.

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Optimizing Constant Value Generation in Just-in-time Compiler for 64-bit JavaScript Engine (64-bit 자바스크립트 적시 컴파일러를 위한 상수 값 생성 최적화)

  • Choi, Hyung-Kyu;Lee, Jehyung
    • Journal of KIISE
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    • v.43 no.1
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    • pp.34-39
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    • 2016
  • JavaScript is widely used in web pages with HTML. Many JavaScript engines adopt Just-in-time compilers to accelerate the execution of JavaScript programs. Recently, many newly introduced devices are adopting 64-bit CPUs instead of 32-bit and Just-in-time compilers for 64-bit CPU are slowly being introduced in JavaScript engines. However, there are many inefficiencies in the currently available Just-in-time compilers for 64-bit devices. Especially, the size of code is significantly increased compared to 32-bit devices, mainly due to 64-bit wide addresses in 64-bit devices. In this paper, we are going to address the inefficiencies introduced by 64-bit wide addresses and values in the Just-in-time compiler for the V8 JavaScript engine and propose more efficient ways of generating constant values and addresses to reduce the size of code. We implemented the proposed optimization in the V8 JavaScript engine and measured the size of code as well as performance improvements with Octane and SunSpider benchmarks. We observed a 3.6% performance gain and 0.7% code size reduction in Octane and a 0.32% performance gain and 2.8% code size reduction in SunSpider.

Sweet spot search of multi peak beam using Genetic Algorithm (Genetic Algorithm을 이용한 멀티 피크 빔의 최적방향탐색)

  • Hwang Jong Woo;Lim Sung Jin;Eom Ki Hwan;Sato Yoichi
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.301-304
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    • 2004
  • In this paper, we propose a method to find the optimal direction of the multi beam between each station on the point-to-point link by genetic algorithm. In the proposed method, maximum value in optimal direction on each station is used as a fitness function. The beam of millimeter wave generates a lot of multi-peak because of much influence of noise. About each gene, we simulated this method using 16bit, 32bit, and 32bit split algorithm. 32bit split uses 16bit gene information. Each antenna makes 32bit gene information by adding gene information of two antennas having 16bit gene. Through the proposed method, we could have gotten a good output without 32bit gene information.

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