• 한국통신학회논문지
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• 제21권2호
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• pp.409-416
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• 1996

This paper describes the simulation environment that verifies whether a new microporcessor described with HDL is compatible with an existing microprocessor. The compatibility verification is done by showing that the new microprocessor executes the OS(Operating System) program used in the existing microprocessor without any modification of its binary code. The proposed verification environment consists of a virtual system and a graphic user interface (GUI) module. Each module is independently designed based on serve-client model and three exists a communication part for information interchange between the two modules. This paper describes the method of constructing the verification environment and presents the compatibility verification environment of the x86 microprocessor as the simulation result.

• 대한전자공학회논문지
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• 제27권2호
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• pp.1-8
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• 1990

부호율 r=b/n인 2진길쌈부호의 부등 비트오류 제어특성을 해석한다. Viterbi 복호되어 나온 b비트로 구성된 정보벡터에서 각 비트가 갖는 오류확률은 서로 다를 수 있다. 따라서 각 비트의 오류제어 성능은 그외 다른 비트의 오류제어 성능과 다를 수 있다. 이러한 부등 비트 오류특성은 DPCM 시스템의 표본 데이타를 전송할 때 전송상에서 신호대 잡음비의 개선을 위해 적용될 수 있다.

• 전자공학회논문지A
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• 제32A권7호
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• pp.115-122
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• 1995

This paper presents the simulation environment that verifies whether a new microprocessor described with HDL is compatible with MS-DOS. The phrase 'compatible with MS-DOS' means that the microprocessor can execute MS-DOS without any modification of MS-DOS's binary code. The proposed verification environment consists of HDL simulator and user interface module. And the communications between them are performed by using sockets which UNIXprovide. The HDL simulator is equipped with several functions, which use PLI to emulate ROM-BIOS facilities. The ROM-BIOS emulation routine is described by using these functions. User interface module utilizes S/MOTIF and participates in emulating PC monitor and keyboard. The verification environment is tested by executing the MS-DOS commands (DIR, FORMAT, DATE, TIME etc.) with the HDL model of microprocessor, and the display of user interface module verifies that the environment works correctly. In this paper, the method of constructing the verification environment is presented, and the simulation results are summarized.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.49-50
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• 2006

Digital satellite systems are usually integrated with terrestrial systems to provide various services, and in these cases they should satisfy the performance objectives defined by the terrestrial systems. Recommendation ITU-R S.1062 specifies the performance of digital satellite systems. The performance objectives were given in terms of bit error probability divided by the average number of errors per burst versus percentage of time. This paper presents theoretical method to estimate performance measure of digital satellite systems defined in Recommendation ITU-R S.1062. We show performance estimation results of duo-binary Turbo codes, and verify them by comparing to the simulation results.

• 전자공학회논문지B
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• 제32B권11호
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• pp.153-162
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• 1995

When vector quantization is used in low rate image coding (e.g., R<0.5), the primary problem is the tremendous computational complexity which is required to search the whole codebook to find the closest codevector to an input vector. Since the number of code vectors in a vector quantizer is given by an exponential function of the dimension. i.e., L=2$^{nR}$ where Rn. To alleviate this problem, a multiple shell structure of hypercube feature maps (MSSHFM) is proposed. A binary HFM of k-dimension is composed of nodes at hypercube vertices and a multiple shell architecture is constructed by surrounding the k-dimensional hfm with a (k+1)-dimensional HFM. Such a multiple shell construction of nodes inherently has a complete tree structure in it and an efficient partial search scheme can be applied with drastically reduced computational complexity, computer simulations of still image coding were conducted and the validity of the proposed method has been verified.

• International Journal of Precision Engineering and Manufacturing
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• 제5권3호
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• pp.11-18
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• 2004

In this paper, the classification of artificial defects in semiconductor packages is studied by using pattern recognition technology. For this purpose, the pattern recognition algorithm includes the user made MATLAB code. And preprocess is made of the image process and self-organizing map, which is the input of the back-propagation neural network and the dimensionality reduction method, The image process steps are data acquisition, equalization, binary and edge detection. Image process and self-organizing map are compared to the preprocess method. Also the pattern recognition technology is applied to classify two kinds of defects in semiconductor packages: cracks and delaminations.

• 한국통신학회논문지
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• 제15권3호
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• pp.260-268
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• 1990

본 논문에서는 도약속도를 높이기 위하여 이중 주파수 합성기를 도입하였으며 시스템을 간략화하기 위하여 다음의 몇가지 방식을 제안하였다. PLL 루프에 직접 FSK 변조를 하기 위해 VCO의 이득을 선형화시켰으며, 2개의 수동상관기를 이용하여 코드동기를 얻을 수 있는 수정된 정합 필터 방식을 제안하였다.

• Journal of Communications and Networks
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• 제18권1호
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• pp.40-49
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• 2016

In this paper, we present a symbol-level iterative source-channel decoding (ISCD) algorithm for reliable transmission of variable-length codes (VLCs). Firstly, an improved source a posteriori probability (APP) decoding approach is proposed for packetized variable-length encoded Markov sources. Also proposed is a recursive implementation based on a three-dimensional joint trellis for symbol decoding of binary convolutional codes. APP channel decoding on this joint trellis is realized by modification of the Bahl-Cocke-Jelinek-Raviv algorithm and adaptation to the non-stationary VLC trellis. Simulation results indicate that the proposed ISCD scheme allows to exchange between its constituent decoders the symbol-level extrinsic information and achieves high robustness against channel noises.

• Journal of Astronomy and Space Sciences
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• 제19권4호
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• pp.263-272
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• 2002

보현산 천문대의 1.8m 망원경을 이용하여 1999년 10월 19일부터 21일까지 총 3일간 W UMa형 접촉쌍성 V523 Cas를 CCD 측광관측하여 총 616 (308의 ${\Delta}$b점, 308의 ${\Delta}$v점) 개의 관측점을 얻었다. 우리의 관측점으로부터 4개의 새로운 극심시각(주극심 2개, 부극심 2개)을 산출하였다. 우리가 얻은 BV 광도곡선과 Milone et al.(1985)의 시선속도곡선을 Wilson-Devinney(WD) 방법으로 흑점이 있는 경우와 없는 경우로 나누어 광도곡선의 해를 산출하였다.

• 한국산학기술학회논문지
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• 제7권6호
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• pp.1224-1230
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• 2006

RFID 태그에 기록되는 ID의 구조는 해당 규격에 따라 이진수나 문자 형태로 기록되며, 이들 자료가 RF 리더로 읽힌 다음 의미 있는 ID로 변경된다. 이 ID는 인터넷 서비스를 위하여 FQDN 형태로 변경이 필요하며, 이후 URN에서 제시하는 변환 과정을 통하여 해당 ID의 서비스 루트를 찾아가서 궁극적으로 원하는 자료를 얻게 된다. 본 연구에서는 이러한 여러 변환 단계에서 필요한 기술적 사항과 이에 따라 특정 ID 체계를 RFID로 표현하여 서비스할 경우 필요한 과정과 고려 사항에 대한 연구를 진행하였다. 샘플 ID로써 ISBN을 RFID 시스템에 적용하였다.