• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.12
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• pp.5361-5374
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• 2016

Combining channel coding and network coding in a physical layer in a fading channel, generalized joint channel-network coding (G-JCNC) is proved to highly perform in a two-way relay channel (TWRC). However, most relevant discussions are restricted to symmetric networks. This paper investigates the G-JCNC protocols in an asymmetric TWRC (A-TWRC). A newly designed encoder used by source nodes that is dedicated to correlate codewords with different orders is presented. Moreover, the capability of a simple common non-binary decoder at a relay node is verified. The effects of a power match under various numbers of iteration and code lengths are also analyzed. The simulation results give the optimum power match ratio and demonstrate that the designed scheme based on G-JCNC in an A-TWRC has excellent bit error rate performance under an appropriate power match ratio.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.2
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• pp.409-416
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• 1996

This paper describes the simulation environment that verifies whether a new microporcessor described with HDL is compatible with an existing microprocessor. The compatibility verification is done by showing that the new microprocessor executes the OS(Operating System) program used in the existing microprocessor without any modification of its binary code. The proposed verification environment consists of a virtual system and a graphic user interface (GUI) module. Each module is independently designed based on serve-client model and three exists a communication part for information interchange between the two modules. This paper describes the method of constructing the verification environment and presents the compatibility verification environment of the x86 microprocessor as the simulation result.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.2
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• pp.1-8
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• 1990

The unequal bit-error control of rate r=b/n binary convolutional code is analyzed. The error protection afforded to each digit of the viterbi decoded b-tuple information word can be different from that afforded to other digit. The property of the unequal protection can be applied for improvement of SNR in transmitting sampled data of DPCM system.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.7
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• pp.115-122
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• 1995

This paper presents the simulation environment that verifies whether a new microprocessor described with HDL is compatible with MS-DOS. The phrase 'compatible with MS-DOS' means that the microprocessor can execute MS-DOS without any modification of MS-DOS's binary code. The proposed verification environment consists of HDL simulator and user interface module. And the communications between them are performed by using sockets which UNIXprovide. The HDL simulator is equipped with several functions, which use PLI to emulate ROM-BIOS facilities. The ROM-BIOS emulation routine is described by using these functions. User interface module utilizes S/MOTIF and participates in emulating PC monitor and keyboard. The verification environment is tested by executing the MS-DOS commands (DIR, FORMAT, DATE, TIME etc.) with the HDL model of microprocessor, and the display of user interface module verifies that the environment works correctly. In this paper, the method of constructing the verification environment is presented, and the simulation results are summarized.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.49-50
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• 2006

Digital satellite systems are usually integrated with terrestrial systems to provide various services, and in these cases they should satisfy the performance objectives defined by the terrestrial systems. Recommendation ITU-R S.1062 specifies the performance of digital satellite systems. The performance objectives were given in terms of bit error probability divided by the average number of errors per burst versus percentage of time. This paper presents theoretical method to estimate performance measure of digital satellite systems defined in Recommendation ITU-R S.1062. We show performance estimation results of duo-binary Turbo codes, and verify them by comparing to the simulation results.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.11
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• pp.153-162
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• 1995

When vector quantization is used in low rate image coding (e.g., R<0.5), the primary problem is the tremendous computational complexity which is required to search the whole codebook to find the closest codevector to an input vector. Since the number of code vectors in a vector quantizer is given by an exponential function of the dimension. i.e., L=2$^{nR}$ where Rn. To alleviate this problem, a multiple shell structure of hypercube feature maps (MSSHFM) is proposed. A binary HFM of k-dimension is composed of nodes at hypercube vertices and a multiple shell architecture is constructed by surrounding the k-dimensional hfm with a (k+1)-dimensional HFM. Such a multiple shell construction of nodes inherently has a complete tree structure in it and an efficient partial search scheme can be applied with drastically reduced computational complexity, computer simulations of still image coding were conducted and the validity of the proposed method has been verified.

• International Journal of Precision Engineering and Manufacturing
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• v.5 no.3
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• pp.11-18
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• 2004

In this paper, the classification of artificial defects in semiconductor packages is studied by using pattern recognition technology. For this purpose, the pattern recognition algorithm includes the user made MATLAB code. And preprocess is made of the image process and self-organizing map, which is the input of the back-propagation neural network and the dimensionality reduction method, The image process steps are data acquisition, equalization, binary and edge detection. Image process and self-organizing map are compared to the preprocess method. Also the pattern recognition technology is applied to classify two kinds of defects in semiconductor packages: cracks and delaminations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.3
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• pp.260-268
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• 1990

This paper investigates the design of a frequency hopping FSK tranceiver system, where the system enhancements are made in the following three aspects: dual frequency synthesiszation for the increased hopping rate, linearization of VCO gain in PLL to improve BFSK modulation characteristics, and fast code synchronization by the matched filter method.

• Journal of Communications and Networks
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• v.18 no.1
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• pp.40-49
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• 2016

In this paper, we present a symbol-level iterative source-channel decoding (ISCD) algorithm for reliable transmission of variable-length codes (VLCs). Firstly, an improved source a posteriori probability (APP) decoding approach is proposed for packetized variable-length encoded Markov sources. Also proposed is a recursive implementation based on a three-dimensional joint trellis for symbol decoding of binary convolutional codes. APP channel decoding on this joint trellis is realized by modification of the Bahl-Cocke-Jelinek-Raviv algorithm and adaptation to the non-stationary VLC trellis. Simulation results indicate that the proposed ISCD scheme allows to exchange between its constituent decoders the symbol-level extrinsic information and achieves high robustness against channel noises.

• Journal of Astronomy and Space Sciences
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• v.19 no.4
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• pp.263-272
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• 2002

A total of 616 observations (308 in B, 308 in V) to. V523 Cas was made on three nights from October 19 to 21 in 1999 using the 1.8m telescope with 2K CCD camera of the Bohyunsan Optical Astronomy Observatory of KAO. With our data we constructed the BV light curves and determined 4 times of minimum light. We also obtained physical parameters of the system by combined analysis of both light and radial velocity curves using the Wilson-Devinney code.