• Title/Summary/Keyword: Binary Sequence Generator

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On a Multiple-cycle Binary Sequence Genrator Based on S-box (S-box 형태의 다 수열 발생기에 관한 연구)

  • Lee, Hun-Jae
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.5
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    • pp.1474-1481
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    • 2000
  • The number of keystream cycle sequences has been proposed as a characteristic of binary sequence generator for cryptographic application, but in general the most of binary sequence generators have a single cycle. On the other hand, S-box has been used to block cipher for a highly nonlinear element and then we apply it to the stream cipher with a high crypto-degree. In this paper, we propose a multiple-cycle binary sequence generator based on S-box which has a high nonlinearity containing SAC property and analyze its period, linear complexity, randomness and the number of keystream cycle sequences.

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Binary Sequence Generator with a Large Number of Output Sequences (다수열 출력 이진 수열 발생기)

  • 이훈재;문상재
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.7 no.3
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    • pp.11-22
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    • 1997
  • The number of output sequence was proposed as a characteristic of binary sequence generators for cryptographic application, but in general most of binary sequence generators have single number of output sequence. In this paper, we propose two types of binary sequence generators with a large number of output sequences. The first one is a Switched-Tap LFSR (STLFSR) and it applies to the generalized nonlinear function and the Geffe's generator as example. The other is a generalized memory sequence generator(GMEM-BSG) which is an improved version of the Golic's memory sequence generator (MEM-BSG) with a large number of output sequences, and its period, linear complexity, and the number of output sequence are derived.

A Proposal on a Multiple-Cycle Binary Sequence Generator with a ST-LFSR

  • Lee, Hoon-Jae;Park, Hee-Bong
    • Journal of Korea Society of Industrial Information Systems
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    • v.7 no.5
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    • pp.67-72
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    • 2002
  • The number of keystream cycle sequences has been proposed as a characteristic of binary sequence generators for cryptographic applications, but in general most binary sequence generators have the only one-cycle sequence. In this paper, we propose a switching-tap LFSR as a basic function of a multiple-cycle binary sequence generator and the improved Rueppel's multiple-cycle generator. Finally we analyze its period, linear complexity, and the number of its keystream cycle sequences.

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Design of Random Binary Sequence Generator using the Chaotic Map (혼돈맵을 사용한 난수성 2진 순서발생기의 설계)

  • Park, Kwang-Hyeon;Baek, Seung-Jae
    • The Journal of the Korea Contents Association
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    • v.8 no.7
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    • pp.53-57
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    • 2008
  • The discretized saw-tooth map with the 16-bit finite precision which is one of the 1-dimensional chaotic maps is designed, and the circuit of chaotic binary sequence generator using the discretized saw-tooth map is presented also in this brief. The real implementation of designed chaotic map is accomplished by connecting the input and output lines exactly according to the simplified Boolean functions of output variables obtained from truth table which is discretized. The random binary output sequences generated by mLFSR generator were used for the inputs of descretized saw-tooth map, and, by the descretized map, chaotic binary sequence which has more long period of 16 times minimally is generated as a results.

A Study on a Binary Random Sequence Generator with Two Characteristic Polynomials (두개의 특성 다항식으로 구성된 이진 난수열 발생기에 관한 연구)

  • 김대엽;주학수;임종인
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.3
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    • pp.77-85
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    • 2002
  • A Research of binary random sequence generator that uses a linear shift register had been studied since the 1970s. These generators were used in stream cipher. In general, the binary random sequence generator consists of linear shift registers that generate sequences of maximum period and a nonlinear filter function or a nonlinear combination function to generate a sequence of high linear complexity. Therefore, To generate a sequence that have long period as well as high linear complexity becomes an important factor to estimate safety of stream cipher. Usually, the maximum period of the sequence generated by a linear feedback shift register with L resistors is less than or equal to $2^L$-1. In this paper, we propose new binary random sequence generator that consist of L registers and 2 sub-characteristic polynomials. According to an initial state vector, the least period of the sequence generated by the proposed generator is equal to or ions than it of the sequence created by the general linear feedback shift register, and its linear complexity is increased too.

On a High-Speed Parallel-LM Binary Sequcence Generator (고속 병렬형 LM 이진 수열 발생기)

  • Lee, Hoon-Jae
    • The KIPS Transactions:PartC
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    • v.10C no.7
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    • pp.851-856
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    • 2003
  • The LM generator is an improved summation generator with maximum period, near maximum linear complexity and maximum order of correlation immunity, and it has a property with the input-output correlation immunity In this paper, we propose the high-speed m-parallel LM-BSG and 8-parallel LM-BSG for detail as a design example. When compared with a conventional stream cipher, the properties of the proposed cipher exhibited the same crypto-degree (security) with a rt times faster processing.

A proposal of binary sequence generator, Threshold Clock-Controlled LM-128 (클럭 조절 방식의 임계 클럭 조절형 LM-128 이진 수열 발생기 제안)

  • Jo, Jung-bok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.5
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    • pp.1104-1109
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    • 2015
  • Due to the rapid growth in digital contents, it is important for us to design a high speed and secure encryption algorithm which is able to comply with the existing and future needs. This paper proposes an alternative approach for self-decimated LM-128 summation sequence generator, which will generate a higher throughput if compared to the conventional generator. We design and implement a threshold clock-controlled LM-128 and prove that it has a lower clock cycle and hence giving a higher key stream generation speed. The proposed threshold clock-control LM-128 generator consists of 256 bits inner state with 128 bits secret key and initialization vector. The cipher achieves a security level of 128 bits to be adapted to the digital contents security with high definition and high quality.

ON A SECURE BINARY SEQUENCE GENERATED BY A QUADRATIC POLYNOMIAL ON $\mathbb{Z}_{2^n}$

  • Rhee, Min-Surp
    • Journal of applied mathematics & informatics
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    • v.29 no.1_2
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    • pp.247-255
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    • 2011
  • Invertible functions with a single cycle property have many cryptographic applications. The main context in which we study them in this paper is pseudo random generation and stream ciphers. In some cryptographic applications we need a generator which generates binary sequences of period long enough. A common way to increase the size of the state and extend the period of a generator is to run in parallel and combine the outputs of several generators with different period. In this paper we will characterize a secure quadratic polynomial on $\mathbb{Z}_{2^n}$, which generates a binary sequence of period long enough and without consecutive elements.

Power Spectra of the Hybrid Random PWM(HRPWM) Technique Adopting a Random Triangular Carrier (랜덤 삼각파 캐리어를 적용한 하이브리드 랜덤 PWM(HRPWM)방식의 파워 스펙트럼)

  • Kim Ki-Seon;Lim Young-Cheol;Park Sung-Jun;Kim Kwang-Heon;Jung Young-Gook
    • The Transactions of the Korean Institute of Power Electronics
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    • v.10 no.5
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    • pp.501-507
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    • 2005
  • This paper proposes a Hybrid Random PWM(HRPWM) technique using a LF2407 DSP board in order to spread the power spectra of an induction motor. The proposed method is composed to the PRBS (Pseudo-Random Binary Sequence) with the Lead-Lag random bit and the random triangular carrier for the logical comparison. Also, a DSP generates the random number, the PRBS and the three-phase reference signal, a MAX038 chip operating as frequency modulator generates the random triangular carrier. For verification of the proposed method, the experiments were conducted with a three-phase adjustable speed a.c drives, and the results of simulations and experiments are presented.

Design of Discretized Tent Map (이산화된 텐트맵의 설계)

  • Baek, Seung-Jae;Park, Jin-Soo
    • The Journal of the Korea Contents Association
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    • v.8 no.4
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    • pp.86-91
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    • 2008
  • To present the design procedure of discretized 8-bit tent map executing the transformation of tent function which is one of the chaotic functions, first, the truth table of discretized tent map was written, and then according to the simplified Boolean algebra equations obtained from the truth table, the discretized map is implemented with the exclusive logic gate as a real hardware. The discretized tent map circuit which provides the feedback circuit for generating the period-8 states relevant to the 8-bit finite precision is also designed and presented in this paper. Furthermore, it might be used stream cipher system with a new key-stream circuit for generate of chaotic binary sequence.