• Journal of Power Electronics
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• 제12권2호
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• pp.242-248
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• 2012

Self oscillating current fed push pull resonant inverters can be controlled without using special drivers. Dc current flows through the choke coil and the power switches, although the driving signals of the power switches are sinusoidal. When the base current is near zero, the transistors cannot be operated in switching mode. Hence higher switching power losses and instantaneous peak power during off transitions are observed. In this study, an alternative design has been proposed to overcome this problem. A prototype circuit has been built which provides dc bias current to the base of the transistors. Experimental results are compared with theoretical calculations to demonstrate the validity of the design. The proposed design decreases the peak and average power losses by about 8 times, when compared to conventional designs.

• Journal of Advanced Marine Engineering and Technology
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• 제9권3호
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• pp.250-256
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• 1985

With the advant of thryistors having large peak inverse voltages, current-source inverters are becoming very popular to feed induction motors. But it is very difficult to analysis the commutation. Since the actual variation of current during commutation is neither instantaneous nor linear and is effected by many parameters. Minimized bias-time of reverse voltages during commutation is expressed in term of machine parameters, capacitor voltage, load current and so on. The minimized bias-time is computed with y and z and also the commuation mechanism is tested on 2.2 kw induction motor. The computed results are compared with the experimental results, and the results give a good information for designing the commutation mechanism.

• 한국태양광발전학회지
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• 제3권2호
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• pp.42-47
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• 2017

The potential induced degradation (PID) phenomenon shows severe power loss within several years from the initial installation of solar power system. The accumulated power loss by PID is inevitable because the PID is suspected only if the power loss exceeds several percent. In this paper, we analyzed the cases of PID diagnosis and recovery by visiting the suspected PID site about 17 months after the installation of the 100kW PV system. The power difference of the two 50kW inverters was more than 20kWh, and the PR difference was more than 8%. From the beginning of the installation, the difference in power gradually increased. The recovery was observed for about 7 months by applying 1000V in the reverse bias at night. As a result, the power difference of the two inverters was recovered to within 2kWh. In the case of a power station suffering from PID in the field, it will be helpful for stable development operation by quick diagnosis and problem solving.

• 전자공학회논문지 IE
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• 제44권2호
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• pp.14-20
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• 2007

본 논문에서는 개선된 성능을 갖는 4치 D-플립플롭을 제안하였다. 제안된 4치 D 플립플롭은 뉴런모스를 기반으로 바이어스 인버터, 온도계 코드 출력회로, EX-OR 게이트, 전달 게이트를 이용하여 4치 항등 논리회로(Identity logic circuit)를 구성하고, 이를 2진의 RS 래치 회로와 결합하여 설계하였다. 설계된 회로들은 3.3V 단일 공급 전원에서 $0.35{\mu}m$ 1-poly 6-metal COMS 공정 파라미터 표준조건에서 HSPICE를 사용하여 모의실험 하였다. 모의실험 결과, 본 논문에서 제안된 4치 D 플립플롭은 100MHz 전후까지의 빠른 동작속도로 측정되었으며 PDP(Power dissipation-delay time product)와 FOM(Figure of merit)은 각각 59.3pJ과 33.7로 평가되어졌다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
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• pp.632-634
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• 2004

First for high-qualify images and reducing process-error and driving speed, the designed 8-bit data driving circuit consists of a constant transconductance bias circuit, D-F/Fs by shift registers using static transmission gates, 1st latch and 2nd latch by tristate inverters, level shifters, current steering segmented D/A converters by 4MSB thermometer decoder and 4LSB weighted type. Second, we designed gray amp for power saving. These data driving circuits are designed with $0.35-{\mu}m$ CMOS technologies at 3.3 V and 18 V power supplies and simulated with HSPICE.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1336-1339
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• 2007

Since organic thin film transistor (OTFT) provides simple and low cost processes, its application to the OTFT display has been studied. We developed an RC oscillator using organic thin film transistor and inverters with bootstrapping transistors. Device parameters were optimized by the simulation and OTFT RC oscillators were fabricated. The oscillator frequency and its dependence on resistance and bias voltage were studied. The organic TFT is adequate for low cost and simple process integrated circuits. The frequency of oscillation was simulated and measured. It is acceptable for low-cost microelectronic device and flat panel displays.

• 한국태양에너지학회 논문집
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• 제26권1호
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• pp.91-98
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• 2006

Islanding phenomenon of utility-connected photovoltaic power conditioning systems(PV PCS) can cause a variety of problems and must be prevented. If the real and reactive power supplied by PV PCS are closely matched to those of load, islanding detection by passive methods becomes difficult. The active frequency drift(AFD) method, called the frequency bias method, enables islanding detection by forcing the frequency of the voltage in the islanding to drift up or down. In this paper, non-detection zone(NDZ) of AFD is analyzed for the islanding detection method of utility-connected PV PCS by the simulation software tool PSIM.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.534-536
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• 2009

We have fabricated solution-processed zinc-tin oxide thin film transistors (TFTs) and simple circuits on glass substrates. We report a solutionprocessed zinc-tin oxide TFTs on silicon wafer with mobility greater than 9 $cm^2/V{\cdot}s$ (W/L = 100/5 ${\mu}m$) and threshold voltage variation of less than 1 V after bias-stressing. Also, we fabricated solution-processed zinc-tin oxide circuits including inverters and 7-stage ring oscillators fabricated on glass substrates using the developed zinc-tin oxide TFTs.

• 한국진공학회지
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• 제17권5호
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• pp.461-465
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• 2008

적층 박막 내에서의 상변화는 주변 층에 영향을 준다. 결정화가 게이트 절연층에 주는 영향이 제거된 선결정화법(precrystallization)이 금속 유도 일측면 결정화(metal-induced unilateral crystallization)에 의해 제작된 다결정 실리콘 박막 트랜지스터 소자 및 회로의 전기적 특성에 미치는 영향에 대하여 연구하였다. 이 방법으로 만들어진 소자는 일반적인 후 결정화(postcrystallization) 소자에 비하여 높은 전류 구동력을 보였다. 여기에 본 연구는 DC bias에 의한 ring oscillator의 특성 변화를 연구하였다. 선결정화된 실리콘 박막을 이용하여 제작한 PMOS inverter는 후결정화된 실리콘 박막을 이용하여 제작한 inverter에 비하여 매우 동적(dynamic)이고도 안정적인 특성을 보였다.

• Journal of Electrical Engineering and Technology
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• 제12권6호
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• pp.2227-2236
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• 2017

In order to solve the neutral-point voltage fluctuation problem of three-phase three-level T-type inverters (TPTLTIs), the unbalance characteristics of capacitor voltages under different switching states and the mechanism of neutral-point voltage fluctuation are revealed. Based on the mathematical model of a TPTLTI, a feed-forward voltage balancing control strategy of DC-link capacitor voltages error is proposed. The strategy generates a DC bias voltage using a capacitor voltage loop with a proportional integral (PI) controller. The proposed strategy can suppress the neutral-point voltage fluctuation effectively and improve the quality of output currents. The correctness of the theoretical analysis is verified through simulations. An experimental prototype of a TPTLTI based on Digital Signal Processor (DSP) is built. The feasibility and effectiveness of the proposed strategy is verified through experiment. The results from simulations and experiment match very well.