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Quaternary D Flip-Flop with Advanced Performance  

Na, Gi-Soo (School of Catholic University)
Choi, Young-Hee (Jai Neung College)
Publication Information
전자공학회논문지 IE / v.44, no.2, 2007 , pp. 14-20 More about this Journal
Abstract
This paper presents quaternary D flip-flop with advanced performance. Quaternary D flip-flop is composed of the components such as thermometer code output circuit, EX-OR gate, bias inverter, transmission gate and binary D flip-flop circuit. The designed circuit is simulated by HSPICE in $0.35{\mu}m$ one-poly six-metal CMOS process parameters with a single +3.3V supply voltage. In the simulations, sampling frequencies is measured around 100MHz. The PDP parameters and FOM we estimated to be 59.3fJ, 33.7 respectively.
Keywords
Quaternary; D-FF; Bias inverters; Transmission gates; Thermometer code;
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