• Title/Summary/Keyword: Bias inverters

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Switching-Mode BJT Driver for Self-Oscillated Push-Pull Inverters

  • Borekci, Selim;Oncu, Selim
    • Journal of Power Electronics
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    • v.12 no.2
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    • pp.242-248
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    • 2012
  • Self oscillating current fed push pull resonant inverters can be controlled without using special drivers. Dc current flows through the choke coil and the power switches, although the driving signals of the power switches are sinusoidal. When the base current is near zero, the transistors cannot be operated in switching mode. Hence higher switching power losses and instantaneous peak power during off transitions are observed. In this study, an alternative design has been proposed to overcome this problem. A prototype circuit has been built which provides dc bias current to the base of the transistors. Experimental results are compared with theoretical calculations to demonstrate the validity of the design. The proposed design decreases the peak and average power losses by about 8 times, when compared to conventional designs.

Optimum design on the commutation circuit of a current source inverter feeding on induction motor (유도전동기 구동을 위한 전류형 인버어터의 전류회로 최적설계에 관한 연구)

  • 노창주;홍순일
    • Journal of Advanced Marine Engineering and Technology
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    • v.9 no.3
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    • pp.250-256
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    • 1985
  • With the advant of thryistors having large peak inverse voltages, current-source inverters are becoming very popular to feed induction motors. But it is very difficult to analysis the commutation. Since the actual variation of current during commutation is neither instantaneous nor linear and is effected by many parameters. Minimized bias-time of reverse voltages during commutation is expressed in term of machine parameters, capacitor voltage, load current and so on. The minimized bias-time is computed with y and z and also the commuation mechanism is tested on 2.2 kw induction motor. The computed results are compared with the experimental results, and the results give a good information for designing the commutation mechanism.

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옥외 태양광 발전 시스템의 Potential Induced Degradation 진단 및 야간 역전압 회복 연구

  • Choe, Hun-Ju;Kim, Gwang-Hyeon;Jang, Dong-Sik;Bae, Su-Hyeon;Park, No-Chang;O, Won-Uk
    • Bulletin of the Korea Photovoltaic Society
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    • v.3 no.2
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    • pp.42-47
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    • 2017
  • The potential induced degradation (PID) phenomenon shows severe power loss within several years from the initial installation of solar power system. The accumulated power loss by PID is inevitable because the PID is suspected only if the power loss exceeds several percent. In this paper, we analyzed the cases of PID diagnosis and recovery by visiting the suspected PID site about 17 months after the installation of the 100kW PV system. The power difference of the two 50kW inverters was more than 20kWh, and the PR difference was more than 8%. From the beginning of the installation, the difference in power gradually increased. The recovery was observed for about 7 months by applying 1000V in the reverse bias at night. As a result, the power difference of the two inverters was recovered to within 2kWh. In the case of a power station suffering from PID in the field, it will be helpful for stable development operation by quick diagnosis and problem solving.

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Quaternary D Flip-Flop with Advanced Performance (개선된 성능을 갖는 4치 D-플립플롭)

  • Na, Gi-Soo;Choi, Young-Hee
    • 전자공학회논문지 IE
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    • v.44 no.2
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    • pp.14-20
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    • 2007
  • This paper presents quaternary D flip-flop with advanced performance. Quaternary D flip-flop is composed of the components such as thermometer code output circuit, EX-OR gate, bias inverter, transmission gate and binary D flip-flop circuit. The designed circuit is simulated by HSPICE in $0.35{\mu}m$ one-poly six-metal CMOS process parameters with a single +3.3V supply voltage. In the simulations, sampling frequencies is measured around 100MHz. The PDP parameters and FOM we estimated to be 59.3fJ, 33.7 respectively.

An 8-bit Data Driving Circuit Design for High-Quality Images in Active Matrix OLEDs (고화질 Active Matrix OLED 디스플레이를 위한 8비트 데이터 구동 회로 설계)

  • Jo, Young-Jik;Lee, Ju-Sang;Yu, Sang-Dae
    • Proceedings of the KIEE Conference
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    • 2004.11c
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    • pp.632-634
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    • 2004
  • First for high-qualify images and reducing process-error and driving speed, the designed 8-bit data driving circuit consists of a constant transconductance bias circuit, D-F/Fs by shift registers using static transmission gates, 1st latch and 2nd latch by tristate inverters, level shifters, current steering segmented D/A converters by 4MSB thermometer decoder and 4LSB weighted type. Second, we designed gray amp for power saving. These data driving circuits are designed with $0.35-{\mu}m$ CMOS technologies at 3.3 V and 18 V power supplies and simulated with HSPICE.

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RC Oscillator Based on Organic Thin Film Transistor

  • Kim, Seung-Kyum;Kim, Sang-Woo;Moon, Byeong-Cheon;Choi, Woon-Seop;Bae, Byung-Seong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1336-1339
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    • 2007
  • Since organic thin film transistor (OTFT) provides simple and low cost processes, its application to the OTFT display has been studied. We developed an RC oscillator using organic thin film transistor and inverters with bootstrapping transistors. Device parameters were optimized by the simulation and OTFT RC oscillators were fabricated. The oscillator frequency and its dependence on resistance and bias voltage were studied. The organic TFT is adequate for low cost and simple process integrated circuits. The frequency of oscillation was simulated and measured. It is acceptable for low-cost microelectronic device and flat panel displays.

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A Study of Non-Detection Zone using AFD Method applied to Grid-Connected Photovoltaic Inverter for a variety of Loads (계통연계형 태양광발전 인버터에 사용된 AFD기법의 다양한 부하에 따른 단독운전 불검출영역에 대한 고찰)

  • Ko, Moon-Ju;Choy, Ick;Choi, Ju-Yeop
    • Journal of the Korean Solar Energy Society
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    • v.26 no.1
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    • pp.91-98
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    • 2006
  • Islanding phenomenon of utility-connected photovoltaic power conditioning systems(PV PCS) can cause a variety of problems and must be prevented. If the real and reactive power supplied by PV PCS are closely matched to those of load, islanding detection by passive methods becomes difficult. The active frequency drift(AFD) method, called the frequency bias method, enables islanding detection by forcing the frequency of the voltage in the islanding to drift up or down. In this paper, non-detection zone(NDZ) of AFD is analyzed for the islanding detection method of utility-connected PV PCS by the simulation software tool PSIM.

Solution-Processed Zinc-Tin Oxide Thin-Film Transistors for Integrated Circuits

  • Kim, Kwang-Ho;Park, Sung-Kyu;Kim, Yong-Hoon;Kim, Hyun-Soo;Oh, Min-Suk;Han, Jeong-In
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.534-536
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    • 2009
  • We have fabricated solution-processed zinc-tin oxide thin film transistors (TFTs) and simple circuits on glass substrates. We report a solutionprocessed zinc-tin oxide TFTs on silicon wafer with mobility greater than 9 $cm^2/V{\cdot}s$ (W/L = 100/5 ${\mu}m$) and threshold voltage variation of less than 1 V after bias-stressing. Also, we fabricated solution-processed zinc-tin oxide circuits including inverters and 7-stage ring oscillators fabricated on glass substrates using the developed zinc-tin oxide TFTs.

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Dynamic Characteristics of Metal-induced Unilaterally Crystallized Polycrystalline Silicon Thin-film Transistor Devices and Circuits Fabricated with Precrystallization (선결정화법을 이용한 금속 유도 일측면 결정화에 의해 제작된 다결정 실리콘 박막 트랜지스터 소자 및 회로의 전기적 특성 개선 효과)

  • Hwang, Wook-Jung;Kang, Il-Suk;Kim, Young-Su;Yang, Jun-Mo;Ahn, Chi-Won;Hong, Soon-Ku
    • Journal of the Korean Vacuum Society
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    • v.17 no.5
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    • pp.461-465
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    • 2008
  • The phase transformation in a film influences its surrounding. Effects of the precrystallization method, which removes influences on gate oxide caused by lateral crystallization, in metal-induced unilaterally crystallized polycrystalline silicon thin-film transistor devices and circuits were studied. Device by the method was shown to have a higher current drive, compared with conventional postcrystallized device. Moreover, we studied DC bias-induced changes in the performance of ring oscillator. PMOS inverters fabricated using precrystallized silicon films have very high dynamic and stable performance, compared with inverters fabricated using postcrystallized silicon films.

Research on the Mechanism of Neutral-point Voltage Fluctuation and Capacitor Voltage Balancing Control Strategy of Three-phase Three-level T-type Inverter

  • Yan, Gangui;Duan, Shuangming;Zhao, Shujian;Li, Gen;Wu, Wei;Li, Hongbo
    • Journal of Electrical Engineering and Technology
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    • v.12 no.6
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    • pp.2227-2236
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    • 2017
  • In order to solve the neutral-point voltage fluctuation problem of three-phase three-level T-type inverters (TPTLTIs), the unbalance characteristics of capacitor voltages under different switching states and the mechanism of neutral-point voltage fluctuation are revealed. Based on the mathematical model of a TPTLTI, a feed-forward voltage balancing control strategy of DC-link capacitor voltages error is proposed. The strategy generates a DC bias voltage using a capacitor voltage loop with a proportional integral (PI) controller. The proposed strategy can suppress the neutral-point voltage fluctuation effectively and improve the quality of output currents. The correctness of the theoretical analysis is verified through simulations. An experimental prototype of a TPTLTI based on Digital Signal Processor (DSP) is built. The feasibility and effectiveness of the proposed strategy is verified through experiment. The results from simulations and experiment match very well.