• Title/Summary/Keyword: Bench Mark

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A Study on the Improvement of Noise Performance by Optimizing Machining Process Parameters on Ball Screw (가공최적화를 통한 볼 스크류의 소음성능 향상에 관한 연구)

  • Xu, Zhezhu;Choi, Jong-Hun;Kim, Hyun-Ku;Shin, Joong-Ho;Lyu, Sung-Ki
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.10 no.1
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    • pp.54-61
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    • 2011
  • Ball screw systems are largely used in industry for motion control and motor applications. But the problem of noise, which really perplexes us, is highly correlated with the quality in ball screw systems all the way. In this paper, machining process parameters were evaluated in respects of technique, business, produce and quality to verify which impact influences the noise most. In order to adjust and compare, two comparison groups were set with the present parameters bench mark. Different ball screws were produced as specimens for the noise tests. Through comparing the noise performance of different parameters in the machining process respectively, a group of optimized machining process parameters were obtained. Another noise test was proceeded to know how noise performance was improved by optimizing the machining process parameters. At last, surface roughness tests have been done to know how surface roughness improved by optimization. The improvement of surface roughness is the main factor influences the noise performances.

Untestable Faults Identification Using Critical-Pair Path (임계-쌍 경로를 이용한 시험 불가능 결함의 확인)

  • 서성환;안광선
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.10
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    • pp.29-38
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    • 1999
  • This paper presents a new algorithm RICP(Redundancy Identification using Critical-pair Paths) to identify untestable faults in combinational logic circuits. In a combinational logic circuit, untestable faults occurred by redundancy of circuits. The redundancy of a circuit can be detected by analyzing areas of fanout stem and reconvergent gates. The untestable faults are identified by analyzing stem area using Critical-Pair path which is an extended concept of critical path. It is showed that RICP is better than FIRE(Fault Independent REdundancy identification) algorithm in efficiency. The performance of both algorithms was compared using ISCAS85 bench mark testing circuits.

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Parallel Computation of a Flow Field Using FEM and Domain Decomposition Method (영역분할법과 유한요소해석을 이용한 유동장의 병렬계산)

  • Choi Hyounggwon;Kim Beomjun;Kang Sungwoo;Yoo Jung Yul
    • Proceedings of the KSME Conference
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    • 2002.08a
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    • pp.55-58
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    • 2002
  • Parallel finite element code has been recently developed for the analysis of the incompressible Wavier-Stokes equations using domain decomposition method. Metis and MPI libraries are used for the domain partitioning of an unstructured mesh and the data communication between sub-domains, respectively. For unsteady computation of the incompressible Navier-Stokes equations, 4-step splitting method is combined with P1P1 finite element formulation. Smagorinsky and dynamic model are implemented for the simulation of turbulent flows. For the validation performance-estimation of the developed parallel code, three-dimensional Laplace equation has been solved. It has been found that the speed-up of 40 has been obtained from the present parallel code fir the bench mark problem. Lastly, the turbulent flows around the MIRA model and Tiburon model have been solved using 32 processors on IBM SMP cluster and unstructured mesh. The computed drag coefficient agrees better with the existing experiment as the mesh resolution of the region increases, where the variation of pressure is severe.

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Measurement and Correction of PCB Alignment Error for Screen Printer Using Machine Vision (1) (머신비전을 이용한 PCB 스크린인쇄기의 정렬오차측정 및 위치보정 (1))

  • 신동원
    • Journal of the Korean Society for Precision Engineering
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    • v.20 no.6
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    • pp.88-95
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    • 2003
  • This paper presents the measurement and correction method of PCB alignment errors for PCB screen printer. Electronic equipment is getting smaller and yet must satisfy high performance standard. Therefore, there is a great demand for PCB with high density. However conventional PCB screen printer doesn't have enough accuracy to accommodate the demand fur high-resolution circuit pattern and high-density mounting capacity of electronic chips. It is because the alignment errors of PCB occur when it is loaded to the screen printer. Therefore, this study focuses on the development of the system which is able to measure and correct alignment errors with high-accuracy. An automatic optical inspection part measures the PCB alignment errors using machine vision, and the high-accuracy 3-axis stage makes correction for these errors. This system used two CCD cameras to get images of two fiducial marks of PCB. The geometrical relationship between PCB, cameras, and xy$\theta$ stage is derived, and analytical equations for alignment errors are also obtained. The unknown parameters including camera declining angles and etc. can be obtained by initialization process. Finally, the proposed algorithm is verified by experiments by using test bench.

A Study on the Pseudo-exhaustive Test using a Netlist of Multi-level Combinational Logic Circuits (다층 레벨 조합논리 회로의 Net list를 이용한 Pseudo-exhaustive Test에 관한 연구)

  • 이강현;김진문;김용덕
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.5
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    • pp.82-89
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    • 1993
  • In this paper, we proposed the autonomous algorithm of pseudo-exhaustive testing for the multi-level combinational logic circuits. For the processing of shared-circuit that existed in each cone-circuit when it backtracked the path from PO to PI of CUT at the conventional verification testing, the dependent relation of PI-P0 is presented by a dependence matrix so it easily partitioned the sub-circuits for the pseudo-exhaustive testing. The test pattern of sub-circuit's C-inputs is generated using a binary counter and the test pattern of I-inputs is synthesized using a singular cover and consistency operation. Thus, according to the test patterns presented with the recipe cube, the number of test pattrens are reduced and it is possible to test concurrently each other subcircuits. The proposed algorithm treated CUT's net-list to the source file and was batch processed from the sub-circuit partitioning to the test pattern generation. It is shown that the range of reduced ration of generated pseudo-exhaustive test pattern exhibits from 85.4% to 95.8% when the average PI-dependency of ISACS bench mark circuits is 69.4%.

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Robust Structural Optimization Using Gauss-type Quadrature Formula (가우스구적법을 이용한 구조물의 강건최적설계)

  • Lee, Sang-Hoon;Seo, Ki-Seog;Chen, Shikui;Chen, Wei
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.33 no.8
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    • pp.745-752
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    • 2009
  • In robust design, the mean and variance of design performance are frequently used to measure the design performance and its robustness under uncertainties. In this paper, we present the Gauss-type quadrature formula as a rigorous method for mean and variance estimation involving arbitrary input distributions and further extend its use to robust design optimization. One dimensional Gauss-type quadrature formula are constructed from the input probability distributions and utilized in the construction of multidimensional quadrature formula such as the tensor product quadrature (TPQ) formula and the univariate dimension reduction (UDR) method. To improve the efficiency of using it for robust design optimization, a semi-analytic design sensitivity analysis with respect to the statistical moments is proposed. The proposed approach is applied to a simple bench mark problems and robust topology optimization of structures considering various types of uncertainty.

Comparison of DBMS Performance for processing Small Scale Database (소용량 데이터베이스 처리를 위한 DBMS의 성능 비교)

  • Jang, Si-Woong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.139-142
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    • 2008
  • While a lot of comparisons of DBMS performance for processing large scale database are given as results of bench-mark tests, there are few comparisons of DBMS performance for processing small scale database. Therefore, in this study, we compared and analyzed on the performance of commercial DBMS and public DBMS for small scale database. Analysis results show that while Oracle has low performance on the operations of update and insert due to the overhead of rollback for data safety, MySQL and MS-SQL have good performance without additional overhead.

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Implementation of IDDQ Test Pattern Generator for Bridging Faults (합선 고장을 위한 IDDQ 테스트 패턴 발생기의 구현)

  • 김대익;전병실
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.12A
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    • pp.2008-2014
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    • 1999
  • IDDQ testing is an effective testing method to detect various physical defects occurred in CMOS circuits. In this paper, we consider intra-gate shorts within circuit under test and implement IDDQ test pattern generator to find test patterns which detect considered defects. In order to generate test patterns, gate test vectors which detect all intra-gate shorts have to be found by type of gates. Random test sets of 10,000 patterns are applied to circuit under test. If an applied pattern generates a required test vector of any gate, the pattern is saved as an available test pattern. When applied patterns generate all test vectors of all gats or 10,000 patterns are applied to circuit under test, procedure of test pattern generation is terminated. Experimental results for ISCAS'85 bench mark circuits show that its efficiency is more enhanced than that obtained by previously proposed methods.

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Parallel Computing of Large Scale FE Model based on Explicit Lagrangian FEM (외연 Lagrangian 유한요소법 기반의 대규모 유한요소 모델 병렬처리)

  • 백승훈;김승조;이민형
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.34 no.8
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    • pp.33-40
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    • 2006
  • A parallel computing strategy for finite element(FE) processing is described and implemented in nonlinear explicit FE code and its parallel performances are evaluated. A self-made linux-cluster supercomputer with 520 CPUs is used as a bench mark test bed. It is observed that speed-up is increased almost idealy even up to 256 CPUs for a large scale model. A communication over head and its effect on the parallel performance is also examined. Parallel performance is compare with the commercial code and developed code shows superior performance as the number of CPUs used are increased.

A Study on Adaptive Partitioning-based Genetic Algorithms and Its Applications (적응 분할법에 기반한 유전 알고리즘 및 그 응용에 관한 연구)

  • Han, Chang-Wook
    • Journal of the Institute of Convergence Signal Processing
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    • v.13 no.4
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    • pp.207-210
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    • 2012
  • Genetic algorithms(GA) are well known and very popular stochastic optimization algorithm. Although, GA is very powerful method to find the global optimum, it has some drawbacks, for example, premature convergence to local optima, slow convergence speed to global optimum. To enhance the performance of GA, this paper proposes an adaptive partitioning-based genetic algorithm. The partitioning method, which enables GA to find a solution very effectively, adaptively divides the search space into promising sub-spaces to reduce the complexity of optimization. This partitioning method is more effective as the complexity of the search space is increasing. The validity of the proposed method is confirmed by applying it to several bench mark test function examples and the optimization of fuzzy controller for the control of an inverted pendulum.