• Title/Summary/Keyword: Baseband

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Design of an NFC Baseband Modem for Software Overhead Minimization (소프트웨어 비용을 최소화하는 NFC 기저대 모뎀 설계)

  • Jun, Jaeyung;Kim, Seon Wook;Han, Youngsun
    • Journal of Korea Multimedia Society
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    • v.18 no.12
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    • pp.1547-1554
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    • 2015
  • Because there are numerous near field communication (NFC) technical standards and each standard has an independent communication protocol, an NFC software for controlling the protocols are significantly complicated. Especially, the anticollision algorithm for establishing the initial communication connection is classified into bit-oriented or time slot method according to the technical standards. Moreover, the anticollision algorithm is generally manipulated in software because of its complexity. In addition, since one host processor is shared by multiple modems in a connectivity SoC, embedding several communication modems with an NFC modem, the spare computing resources can be utilized for other modems by reducing the software cost to control the NFC modem. In this paper, we propose new design methods of the NFC modem for supporting anticollision, framing and bit rate detection in the hardware to reduce the software overhead. Therefore, the utilization of the NFC technology is enhanced in the connectivity SoC by minimizing the cost of software.

Implementation of Anti-Collision Algorithm based on RFID System using FPGA (FPGA를 이용한 RFID 시스템 기반 충돌 방지 알고리즘 구현)

  • Lee, Woo-Gyeong;Kim, Sun-Hyung;Lim, Hae-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.3
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    • pp.413-420
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    • 2006
  • In this thesis, a RFID baseband system is implemented based on the international standard ISO/IEC 18000-6 Type-B using FPCA, and also anti-collision algorithm is implemented to improve the system performance. We compares the performance of the proposed anti-collision algorithm with that binary tree algorithm and bit-by-bit algorithm, and also validated analytic results using OPNET simulation. The proposed algorithm for Type-B transmission protocol and collision prohibition was designed using ISE7.1i which is a FPGA design-tool of Xilinx and implemented with Spartan2 chip which is a FPGA device.

Parameterized IP Core of Complex-Number Multiplier (파라미터화된 복소수 승산기 IP 코어)

  • 양대성;이승기;신경욱
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.05a
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    • pp.307-310
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    • 2001
  • A parameterized complex-number multiplier (PCMUL) core IP (Intellectual Property), which can be used as an essential arithmetic unit in baseband signal processing of digital communication systems, is described. The bit-width of the multiplier is parameterized in the range of 8-b~24-b and is user-selectable in 2-b step. The PCMUL_GEN, a core generator with GUI, generates VHDL code of a CMUL core for a specified bit-width. The IP is based on redundant binary (RB) arithmetic and a new radix4 Booth encoding/decoding scheme proposed in this paper. It results in a simplified internal structure, as well as high-speed, low-power, and area-efficient implementation. The designed IP was verified using Xilinx FPGA board.

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Effective Watermark Detection Using Asymmetric Thresholds (비대칭 임계치를 이용한 효과적인 워터마크 검출 방법)

  • Shin, Chang-Doon;Oh, Hae-Seok
    • The KIPS Transactions:PartB
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    • v.10B no.6
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    • pp.619-628
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    • 2003
  • In this paper, an effective watermark detection technique in the wavelet transform domain is proposed. In this proposed method, the image is 2-level wavelet transformed, and then the watermark with a binary logo is embedded into middle band except baseband and high band to consider Invisibility and robustness. In this paper, we use an asymmetric thresholds watermarking (ATW) in which detection threshold is higher than inserting threshold in order to enhance watermark detection ratio in attacked images. In watermark detection phase, the detection value is not changed when the difference of the selected wavelet neighboring coefficient pairs Is smaller than specific value. The experimental results show that the proposed method has good quality and is robust to various attacks such as the JPEG lossy compression, noise addition, cropping, blurring, etc.

The Performance Evaluation of Extended Phase Recovery Algorithm for OQPSK in Satellite Channel (위성 채널에서 확장된 OQPSK 위상동기 알고리즘 성능평가)

  • 김명섭;송윤정;정지원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.5A
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    • pp.634-640
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    • 2000
  • This paper proposes a new extended decision directed-decision estimated phase recovery algorithm based on maximum likelihood parameter estimation for OQPSK. In this scheme, comparing conventional one, the data dependent noise of phase recovery loop is reduced by inserting filter with 2 taps to in-phase and quadrature-phase channel respectively before phase detector. The proposed scheme is compared to conventionalscheme and OQPSK in aspect to BER(Bit Error Rate) and phase error according to the roll-off factor of baseband filter, the output back-offs of nonlinear satellite channel, and loop bandwidth.

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A Study on the Transmission Characteristics of 400MHz Signal in a Building (400MHz 대역 신호의 건물내 전달 특성에 관한 연구)

  • 차용성;강병권
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2001.06a
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    • pp.17-20
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    • 2001
  • In this paper, we realized a transceiver system for short distance communication with a commercial RF module working in ISM band. Also we measured system performance by transmitting baseband data in a building and then we compared the demodulated data bits with stored data bits in a PC connected with demodulator. The RF module In the experiments works only in the bandwidth of 424MHz-429MHz. The signal level degrades as the distance between transmitter and receiver increases. We measured the signal level and bit error and present the measured results with various locations in the building. And it is concluded that the measured data may be used in the design of short distance network in a building.

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An Improvement on FFT-Based Digital Implementation Algorithm for MC-CDMA Systems (MC-CDMA 시스템을 위한 FFT 기반의 디지털 구현 알고리즘 개선)

  • 김만제;나성주;신요안
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.7A
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    • pp.1005-1015
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    • 1999
  • This paper is concerned with an improvement on IFFT (inverse fast Fourier transform) and FFT based baseband digital implementation algorithm for BPSK (binary phase shift keying)-modulated MC-CDMA (multicarrier-code division multiple access) systems, that is functionally equivalent to the conventional implementation algorithm, while reducing computational complexity and bandwidth requirement. We also derive an equalizer structure for the proposed implementation algorithm. The proposed algorithm is based on a variant of FFT algorithm that utilizes a N/2-point FFT/IFFT for simultaneous transformation and reconstruction of two N/2-point real signals. The computer simulations under additive white Gaussian noise channels and frequency selective fading channels using equal gain combiner and maximal ratio combiner diversities, demonstrate the performance of the proposed algorithm.

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A Design of the Signal Processing Hardware Platform for OFDM Communication Systems (OFDM 통신 시스템을 위한 신호처리 하드웨어 플랫폼 개발)

  • Lee, Byung-Wook;Cho, Sung-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.6C
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    • pp.498-504
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    • 2008
  • In this paper, an efficient hardware platform for the digital signal processing for OFDM Communication systems is presented. The hardware platform consists of a single FPGA, two DSPs with 8000 MIPS of maximum at 1 GHz clock, 2-channel ADC and DAC supporting maximum 125 MHz sampling rate, and flexible data bus architecture, so that a wide variety of baseband signal processing algorithms for practical OFDM communication systems may be implemented and tested. The IEEE 802.16 software modem is also presented in order to verify the effectiveness and usefulness of the designed platform.

Design of Low Noise Frequency Synthesizer for B-WLL RF Tranceiver (낮은 위상 잡음의 B-WLL 대역 주파수 합성기의 설계)

  • 송인찬;고원준;한동엽;황희용;윤상원;장익수
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.6
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    • pp.959-968
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    • 2000
  • In this paper, a low phase noise frequency synthesizer used to TX local oscillator in BWLL RF tranceiver is presented. The phase-locked stable 25GHz-band frequencies in BWLL TX LO are obtained by using 2 GHz baseband frequency synthesizer, sixth-harmonic frequency multiplier and frequency doubler at 12 GHz band frequency input. The 25 GHz band frequency synthesizer presented in this paper has 3-output frequencies at 24.92 GHz, 25.10 GHz, 25.26 GHz. At 24.92 GHz frequency the synthesizer has 0.44 dBm output power and shows -87.93 dBc/Hz(a 10 KHz), -109.54 dBc/Hz (a100 KHz) phase noise characteristics .

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Implementation of an Ultrasound Elasticity Imaging System

  • Cho Gae-Young;Yoon Ra-Young;Park Jeong-Man;Kwon Sung-Jae;Ahn Young-Bok;Bae Moo-Ho;Jeong Mok-Kun
    • Journal of Biomedical Engineering Research
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    • v.27 no.3
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    • pp.117-124
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    • 2006
  • Recently, active research has been going on to measure the elastic modulus of human soft tissue with medical ultrasound imaging systems for the purpose of diagnosing cancers or tumors which have been difficult to detect with conventional B-mode imaging techniques. In this paper, a real-time ultrasonic elasticity imaging system is implemented in software on a Pentium processor-based ultrasonic diagnostic imaging system. Soft tissue is subjected to external vibration, and the resulting tissue displacements change the phase of received echoes, which is in turn used to estimate tissue elasticity. It was confirmed from experiment with a phantom that the implemented elasticity imaging system could differentiate between soft and hard regions, where the latter is twice harder than the former, while operating at an adequate frame rate of 20 frames/s.