• Proceedings of the Materials Research Society of Korea Conference
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• 1997.10a
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• pp.147-147
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• 1997

• 전기의세계
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• v.25 no.1
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• pp.104-107
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• 1976

The switching characteristics of Non-crystalline As-Te-Si-Ge thin film device using Ag, In and Al metal for electrode, has been investigated. Threshold voltage and holding current of each sandwich type device varied due the to formation of the potential barrier in between non crystalline solid and electrode interface.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.32 no.6
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• pp.205-210
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• 1983

This paper presents a steady-state computer solution of the fundamental semiconductor one-dimensional transport equations, describing a single (metal-semiconductor) contact device, involving only one type of charge carrier. The computations are conveniently made by the

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.104.1-104
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• 1998

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.153.1-153
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• 1998

• Elastomers and Composites
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• v.46 no.2
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• pp.112-117
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• 2011

Recently, high growth potential of barrier materials industry including high performance packing materials was expected with increasing the national income and well-being culture. As high barrier materials, polymer nanocomposites have considerable attractions due to their excellent physical properties compared to conventional composite materials. In general, polymer nanocomposites were consisted of polymer matrix and inorganic fillers, such as layered silicate, carbon nanotubes, and metal- or inorganic nanoparticles. Among these materials, layered silicate which was called as the clay was usually used as nano-fillers because of naturally abundant and most economical and structural properties. Clay-reinforced polymer nanocomposites have various advantages, such as high strength, flammability, gas barrier property, abrasion resistance, and low shrinkage and used for automotive and packing materials. Therefore, in this paper, we focused on the need of gas barrier materials and materials-related technologies.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.4
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• pp.271-275
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• 2011

In this paper, thermal stability of palladium germanide (Pd germanide) is analyzed for high performance Schottky barrier germanium metal oxide semiconductor field effect transistors (SB Ge-MOSFETs). Pd germanide Schottky barrier diodes were fabricated on n-type Ge-on-Si substrates and the formed Pd germanide shows thermal immunity up to $450^{\circ}C$. The barrier height of Pd germanide is also characterized using two methods. It is shown that Pd germanide contact has electron Schottky barrier height of 0.569~0.631 eV and work function of 4.699~4.761 eV, respectively. Pd germanide is promising for the nanoscale Schottky barrier Ge channel MOSFETs.

• Current Photovoltaic Research
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• v.12 no.2
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• pp.31-36
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• 2024

Passivating contacts are a promising technology for achieving high efficiency Si solar cells by reducing direct metal/Si contact. Among them, a polysilicon (poly-Si) based passivating contact solar cells achieve high passivation quality through a tunnel oxide (SiO_x) and poly-Si. In poly-Si/SiO_x based solar cells, the passivation quality depends on the amount of dopant in-diffused into the bulk-Si. Therefore, our study fabricated cells by inserting silicon oxide (SiO₂) as a doping barrier before doping and analyzed the barrier effect of SiO₂. In the experiments, p⁺ poly-Si was formed using spin on dopant (SOD) method, and samples ware fabricated by controlling formation conditions such as existence of doping barrier and poly-Si thickness. Completed samples were measured using quasi steady state photoconductance (QSSPC). Based on these results, it was confirmed that possibility of achieving high V_oc by inserting a doping barrier even with thin poly-Si. In conclusion, an improvement in implied V_oc of up to approximately 20 mV was achieved compared to results with thicker poly-Si results.

• Nanomaterials
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• v.12 no.5
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• pp.827-838
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• 2022

Controlling the Schottky barrier height (φ_B) and other parameters of Schottky barrier diodes (SBD) is critical for many applications. In this work, the effect of inserting a graphene interfacial monolayer between a Ni Schottky metal and a β-Ga₂O₃ semiconductor was investigated using numerical simulation. We confirmed that the simulation-based on Ni workfunction, interfacial trap concentration, and surface electron affinity was well-matched with the actual device characterization. Insertion of the graphene layer achieved a remarkable decrease in the barrier height (φ_B), from 1.32 to 0.43 eV, and in the series resistance (R_s), from 60.3 to 2.90 mΩ.cm². However, the saturation current (J_s) increased from 1.26×10^-11 to 8.3×10^-7(A/cm²). The effects of a graphene bandgap and workfunction were studied. With an increase in the graphene workfunction and bandgap, the Schottky barrier height and series resistance increased and the saturation current decreased. This behavior was related to the tunneling rate variations in the graphene layer. Therefore, control of Schottky barrier diode output parameters was achieved by monitoring the tunneling rate in the graphene layer (through the control of the bandgap) and by controlling the Schottky barrier height according to the Schottky-Mott role (through the control of the workfunction). Furthermore, a zero-bandgap and low-workfunction graphene layer behaves as an ohmic contact, which is in agreement with published results.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.518-522
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• 2008

The miniaturization of device size and multilevel interlayers have been developed by ULSI circuit devices. These submicron processes cause serious problems in conventional metallization due to the solubility of silicon and metal at the interface, such as an increasing contact resistance in the contact hole and interdiffusion between metal and silicon. Therefore it is necessary to implement a barrier layer between Si and metal. Thus, the size of multilevel interconnection of ULSI devices is critical metallization schemes, and it is necessary reduce the RC time delay for device speed performance. So it is tendency to study the Cu metallization for interconnect of semiconductor processes. However, at the submicron process the interaction between Si and Cu is so strong and detrimental to the electrical performance of Si even at temperatures below $200^{\circ}C$. Thus, we suggest the tungsten-carbon-nitrogen (W-C-N) thin film for Cu diffusion barrier characterized by nano scale indentation system. Nano-indentation system was proposed as an in-situ and nanometer-order local stress analysis technique.