• Title/Summary/Keyword: Band-Gap Reference(BGR)

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A Bandgap Reference Voltage Generator Design for Low Voltage SoC (저전압 SoC용 밴드갭 기준 전압 발생기 회로 설계)

  • Lee, Tae-Young;Lee, Jae-Hyung;Kim, Jong-Hee;Shim, Oe-Yong;Kim, Tae-Hoon;Park, Mu-Hun;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.1
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    • pp.137-142
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    • 2008
  • The band-gap reference voltage generator which can be operated by low voltage is proposed in this paper. The proposed BGR circuit can be realized in logic process by using parasitic NPN BJTs because a $Low-V_T$ transistors are not necessary. The proposed BGR circuit is designed and fabricated using $0.18{\mu}m$ triple-well process. The mean voltage of measured VREF is 0.72V and the three sigma$(3{\sigma})$ is 45.69mv.

A temperature sensor with low standard deviation with generating reference voltage for use in IoT applications (IoT 어플리케이션에서 활용하는 참조 전압을 같이 생성할 수 있는 표준 편차가 낮은 온도 센서)

  • Juwon Oh;Younggun Pu;Yeonjae Jung;Kangyoon Lee
    • Transactions on Semiconductor Engineering
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    • v.2 no.2
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    • pp.10-14
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    • 2024
  • This paper presents a circuit design aimed at generating the required reference voltage and temperature sensor voltage in conjunction with an ADC, utilizing the current generated by temperature characteristics of BJT components for sensor data conversion. Additionally, two control methods are introduced to reduce the standard deviation of the circuit, resulting in over a ten-fold decrease in standard deviation. The proposed circuit occupies an area of 0.057mm2 and was implemented using 55nm RF process.

Design of PFM Boost Converter with Dual Pulse Width Control (이중 펄스 폭을 적용한 PFM 부스트 변환기 설계)

  • Choi, Ji-San;Jo, Yong-Min;Lee, Tae-Heon;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.9
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    • pp.1693-1698
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    • 2015
  • This paper proposed a PFM(pulse-frequency modulator) boost converter which has dual pulse-width. The PFM boost converter is composed of BGR(band gap voltage reference generating circuit), voltage reference generating circuit, soft-start circuit, error amplifier, high-speed comparator, inductor current sensing circuit and pulse-width generator. Converter has different inductor peak current so it has wider load current range and smaller output voltage ripple. Proposed PFM boost converter generates 18V output voltage with input voltage of 3.7V and it has load current range of 0.1~300mA. Simulation results show 0.43% output voltage ripple at ligh load mode and 0.79% output voltage ripple at heavy load mode. Converter has efficiency 85% at light lode mode and it has maximum 86.4% at 20mA load current.

A DC-DC Converter Design for OLED Display Module (OLED Display Module용 DC-DC 변환기 설계)

  • Lee, Tae-Yeong;Park, Jeong-Hun;Kim, Jeong-Hoon;Kim, Tae-Hoon;Vu, Cao Tuan;Kim, Jeong-Ho;Ban, Hyeong-Jin;Yang, Gweon;Kim, Hyoung-Gon;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.3
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    • pp.517-526
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    • 2008
  • A one-chip DC-DC converter circuit for OLED(Organic Light-Emitting Diode) display module of automotive clusters is newly proposed. OLED panel driving voltage circuit, which is a charge-pump type, has improved characteristics in miniaturization, low cost and EMI(Electro-Magnetic Interference) compared with DC-DC converter of PWM(Pulse Width Modulator) type. By using bulk-potential biasing circuit, charge loss due to parasitic PNP BJT formed in charge pumping, is prevented. In addition, the current dissipation in start-up circuit of band-gap reference voltage generator is reduced by 42% and the layout area of ring oscillator is reduced by using a logic voltage VLP in ring oscillator circuit using VDD supply voltage. The driving current of VDD, OLED driving voltage, is over 40mA, which is required in OLED panels. The test chip is being manufactured using $0.25{\mu}m$ high-voltage process and the layout area is $477{\mu}m{\times}653{\mu}m$.

Low-area Dual mode DC-DC Buck Converter with IC Protection Circuit (IC 보호회로를 갖는 저면적 Dual mode DC-DC Buck Converter)

  • Lee, Joo-Young
    • Journal of IKEEE
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    • v.18 no.4
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    • pp.586-592
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    • 2014
  • In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.

Design of a step-up DC-DC Converter using a 0.18 um CMOS Process (0.18 um CMOS 공정을 이용한 승압형 DC-DC 컨버터 설계)

  • Lee, Ja-kyeong;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.6
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    • pp.715-720
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    • 2016
  • This paper proposes a PWM (Pulse Width Modulation) voltage mode DC-DC step-up converter for portable devices. The converter, which is operated with a 1 MHz switching frequency, is capable of reducing the mounting area of passive devices, such as inductor and capacitor, and is suitable for compact mobile products. This step-up converter consists of a power stage and a control block. The circuit elements of the power stage are an inductor, output capacitor, MOS transistors Meanwhile, control block consist of OPAMP (operational amplifier), BGR (band gap reference), soft-start, hysteresis comparator, and non-overlap driver and some protection circuits (OVP, TSD, UVLO). The hysteresis comparator and non-overlapping drivers reduce the output ripple and the effects of noise to improve safety. The proposed step-up converter was designed and verified in Magnachip/Hynix 0.18um 1-poly, 6-metal CMOS process technology. The output voltage was 5 V with a 3.3 V input voltage, output current of 100 mA, output ripple less than 1% of the output voltage, and a switching frequency of 1 MHz. These designed DC-DC step-up converters could be applied to the Personal Digital Assistants(PDA), cellular Phones, Laptop Computer, etc.