• Title/Summary/Keyword: Balanced Power

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Ku-Band Sub-Harmonically Pumped Single Balanced Resistive Mixers with a Low Pass Filter Using Photonic Band Gap

  • Kim, Jae-Hyuk;Park, Hyun-Joo;Lee, Jong-Chul;Kim, Nam-Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.4
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    • pp.599-609
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    • 2000
  • In this paper, sub-harmonically pumped single balanced resistive mixers are presented . Frequency bandwidth is selected for a Ku-band, which is 11.75-12.25GHz for RF, 5.375∼5.625 GHz for LO, and 1 GHz for IF signals. A rat-race hybrid is designed for the accomplishment of single balanced type. A low pass filter (LPF) with photonic band gap(PBG) structure is used for good conversion loss and unwanted harmonics suppression. Two types of mixers are suggested, which are one with no gate bias for no DC power consumption and the other with the IF amplifier for conversion gain. When a LO signal with the power of 6 dBm at 5.5 GHz is injected, a conversion loss of 12.17dB and a conversion gain of 7.83 dB are obtained for each mixer. For the both mixers , LO to RF isolation of 20 dB and LO to IF isolation of 60dB are obtained. With the RF power of -30dBm to -3dBm, the mixer shows linear characteristics region of IF. this mixer can be applied for Ku-band and other microwave communication systems.

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A Differential Voltage-controlled Oscillator as a Single-balanced Mixer

  • Oh, Nam-Jin
    • International journal of advanced smart convergence
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    • v.10 no.1
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    • pp.12-23
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    • 2021
  • This paper proposes a low power radio frequency receiver front-end where, in a single stage, single-balanced mixer and voltage-controlled oscillator are stacked on top of low noise amplifier and re-use the dc current to reduce the power consumption. In the proposed topology, the voltage-controlled oscillator itself plays the dual role of oscillator and mixer by exploiting a series inductor-capacitor network. Using a 65 nm complementary metal oxide semiconductor technology, the proposed radio frequency front-end is designed and simulated. Oscillating at around 2.4 GHz frequency band, the voltage-controlled oscillator of the proposed radio frequency front-end achieves the phase noise of -72 dBc/Hz, -93 dBc/Hz, and -113 dBc/Hz at 10KHz, 100KHz, and 1 MHz offset frequency, respectively. The simulated voltage conversion gain is about 25 dB. The double-side band noise figure is -14.2 dB, -8.8 dB, and -7.3 dB at 100 KHz, 1 MHz and 10 MHz offset. The radio frequency front-end consumes only 96 ㎼ dc power from a 1-V supply.

Balanced MVC Architecture for High Efficiency Mobile Applications

  • La, Hyun-Jung;Kim, Soo-Dong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.6 no.5
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    • pp.1421-1444
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    • 2012
  • Mobile devices such as Android devices are emerging as a convenient client computing device with mobility and context-sensing capability. However, the computing power and hardware resource of the devices are limited due to their small form-factor. Consequently, large-scaled applications could not be deployed on these devices. Nonetheless, if the large-scaled applications are deployed and executed on the devices, high performance of the applications cannot be guaranteed. To remedy the limitation in terms of performance, it is inevitable to let some heavy-weight functionality executed on the server side and let a client application invoke the functionality in the server. To realize this kind of mobile applications, we adopt well-defined architecture design principles; being thin-client, being layered with Model-View-Controller (MVC), and being balanced between client side and server side. By adopting the principles, we propose a unique, ideal and practical architecture for mobile applications, called balanced MVC architecture. By considering the principles, key design considerations of realizing balanced MVC architecture lie in functionality partitioning. Hence, we define key criteria of determining the degree of performance. And, we define a method to design a balanced MVC architecture which embodies functionality partitioning for high performance, and a simulation-based evaluation method of balanced MVC architectures.

A Novel CPW Balanced Distributed Amplifier Using Broadband Impedance-Transforming MEMS Baluns

  • Lee, Sanghyo
    • Journal of Electrical Engineering and Technology
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    • v.8 no.3
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    • pp.610-612
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    • 2013
  • A novel balanced distributed amplifier (DA) was proposed using novel impedance transforming MEMS baluns. The impedance transforming MEMS balun is matched to $50{\Omega}$ at one input port and $25{\Omega}$ at two output ports. It is based on the electric field mode-change method, thus it is strongly independent of frequency and very compact. The novel balanced DA consists of two $25{\Omega}$-matched DAs and these are combined by $50{\Omega}$-to-$25{\Omega}$ baluns. Theoretically, it has two times wider bandwidth and power capability than the conventional DA. So as to verify the proposed concept, we designed and fabricated a conventional DA and the proposed one using 0.15-${\mu}m$ GaAs pHEMT technology.

Single Balanced Monolithic Diode Mixer using Marchand Balun for Millimeter-wave Applications

  • Ryu, Keun-Kwan;Kim, Sung-Chan
    • Journal of IKEEE
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    • v.16 no.2
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    • pp.127-130
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    • 2012
  • In this paper, we reported on a single balanced monolithic diode mixer using Marchand balun for millimeter-wave applications. The single balanced monolithic mixer was fabricated using drain-source-connected pseudomorphic high electron mobility transistor (PHEMT) diodes considering the PHEMT MMIC full process. The average conversion loss is 16 dB in the RF frequency range of 81~86 GHz at LO frequency of 75 GHz with LO power of 10 dBm. The RF-to-LO isolation characteristics are greater than -30 dB and the total chip size is $1.0mm{\times}1.35mm$.

Design and Fabrication of S-band Ultra High Power Transistorized Amplifier (마이크로파대 고출력 트란지스터 증폭기의 설계와 시작)

  • 심재철;김종련
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.14 no.5
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    • pp.7-14
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    • 1977
  • Conventionally, a TIVT has been used for high power amplification in the microwave frequency range. However, an ultra-high-power amplifier in the 2GHz range has successfully been designed and fabricated employing high power transistors developed recently and available commercially. In the design of the amplifier, a balanced-pair configuration is adopted in order to obtain very high microwave power, and a good impedance matching is achieved by making use of microstripline techniques. For the RF power divider as well as combiner, an approach of stripline directional coupler isadopted because of its easiness in fabrication. The coupler so designed and fabricated indicates a satisfactory performance as a quadrature hybrie coupler. Measurements on the amplifier developed for an immediate commercial application also exhibit excellent overall performance characteristics RF power output, 14 watts, gain 14dB, frequency bandwidth, 160MHz, effciency 40%.

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Rank transformation analysis for 4 $\times$ 4 balanced incomplete block design (4 $\times$ 4 균형불완전블럭모형의 순위변환분석)

  • Choi, Young-Hun
    • Journal of the Korean Data and Information Science Society
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    • v.21 no.2
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    • pp.231-240
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    • 2010
  • If only fixed effects exist in a 4 $\times$ 4 balanced incomplete block design, powers of FR statistic for testing a main effect show the highest level with a few replications. Under the exponential and double exponential distributions, FR statistic shows relatively high powers with big differences as compared with the F statistic. Further in a traditional balanced incomplete block design, powers of FR statistic having a fixed main effect and a random block effect show superior preference for all situations without regard to the effect size of a main effect, the parameter size and the type of population distributions of a block effect. Powers of FR statistic increase in a high speed as replications increase. Overall power preference of FR statistic for testing a main effect is caused by unique characteristic of a balanced incomplete block design having one main and block effect with missing observations, which sensitively responds to small increase of main effect and sample size.

A New Scheme for Maintaining Balanced DC Voltages in Static Var Compensator(SVC) Using Cascade Multilevel Inverter

  • Min, Wan-Ki;Min, Joon-Ki;Choi, Jae-Ho
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.561-565
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    • 2001
  • This paper proposes a new switching scheme of a static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). To improve the un­balanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

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A 3~5 GHz UWB Up-Mixer Block Using 0.18-μm CMOS Technology

  • Kim, Chang-Wan
    • Journal of electromagnetic engineering and science
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    • v.8 no.3
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    • pp.91-95
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    • 2008
  • This paper presents a direct-conversion I/Q up-mixer block, which supports $3{\sim}5$ GHz ultra-wideband(UWB) applications. It consists of a VI converter, a double-balanced mixer, a RF amplifier, and a differential-to-single signal converter. To achieve wideband characteristics over $3{\sim}5$ GHz frequency range, the double-balanced mixer adopts a shunt-peaking load. The proposed RF amplifier can suppress unwanted common-mode input signals with high linearity. The proposed direct-conversion I/Q up-mixer block is implemented using $0.18-{\mu}m$ CMOS technology. The measured results for three channels show a power gain of $-2{\sim}-9$ dB with a gain flatness of 1dB, a maximum output power level of $-7{\sim}-14.5$ dBm, and a output return loss of more than - 8.8 dB. The current consumption of the fabricated chip is 25.2 mA from a 1.8 V power supply.

A Novel Fault Location Method for a Line to Line Fault Using Inverse Theorem of Matrix on Electric Power Lines (행렬의 역정리를 이용한 전력공급 선로의 상간단락 사고지점 검출 방법)

  • Lee Duck-su;Choi Myeon-song;Hyun Seung-ho
    • Proceedings of the KSR Conference
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    • 2004.06a
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    • pp.1321-1324
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    • 2004
  • Unbalanced systems, such as distribution systems, have difficulties in fault locations due to single-phase laterals and loads. In this paper, a novel fault location algorithm is suggested for a line to line faults using inverse theorem of matrix on electric power lines. The fault location for balanced systems has been studied using the current distribution factor, by a conventional symmetrical transformation, but that for unbalanced systems has not been investigated due to their high complexity The proposed algorithms overcome the limit of the conventional algorithm using the conventional symmetrical transformation, which requires the balanced system and are applicable to any electric power system but are particularly useful for unbalanced distribution systems. The simulation results oriented by the real distribution system are presented to show its effectiveness and accuracy.

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