• Title/Summary/Keyword: BUMP-UP

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Fabrication and Characteristics of Electroplated Sn-0.7Cu Micro-bumps for Flip-Chip Packaging (플립칩 패키징용 Sn-0.7Cu 전해도금 초미세 솔더 범프의 제조와 특성)

  • Roh, Myong-Hoon;Lee, Hea-Yeol;Kim, Wonjoong;Jung, Jae Pil
    • Korean Journal of Metals and Materials
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    • v.49 no.5
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    • pp.411-418
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    • 2011
  • The current study investigates the electroplating characteristics of Sn-Cu eutectic micro-bumps electroplated on a Si chip for flip chip application. Under bump metallization (UBM) layers consisting of Cr, Cu, Ni and Au sequentially from bottom to top with the aim of achieving Sn-Cu bumps $10\times10\times6$ ${\mu}m$ in size, with 20${\mu}m$ pitch. In order to determine optimal plating parameters, the polarization curve, current density and plating time were analyzed. Experimental results showed the equilibrium potential from the Sn-Cu polarization curve is -0.465 V, which is attained when Sn-Cu electro-deposition occurred. The thickness of the electroplated bumps increased with rising current density and plating time up to 20 mA/$cm^2$ and 30 min respectively. The near eutectic composition of the Sn-0.72wt%Cu bump was obtained by plating at 10 mA/$cm^2$ for 20 min, and the bump size at these conditions was $10\times10\times6$ ${\mu}m$. The shear strength of the eutectic Sn-Cu bump was 9.0 gf when the shearing tip height was 50% of the bump height.

Characteristics of Plated Bump on Multi-layer Build up PCB by Pulse-reverse Electroplating (Pulse-reverse도금을 이용한 다층 PCB 빌드업 기판용 범프 생성특성)

  • Seo, Min-Hye;Kong, Man-Sik;Hong, Hyun-Seon;Sun, Jee-Wan;Kong, Ki-Oh;Kang, Kae-Myung
    • Korean Journal of Materials Research
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    • v.19 no.3
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    • pp.151-155
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    • 2009
  • Micro-scale copper bumps for build-up PCB were electroplated using a pulse-reverse method. The effects of the current density, pulse-reverse ratio and brightener concentration of the electroplating process were investigated and optimized for suitable performance. The electroplated micro-bumps were characterized using various analytical tools, including an optical microscope, a scanning electron microscope and an atomic force microscope. Surface analysis results showed that the electroplating uniformity was viable in a current density range of 1.4-3.0 A/$dm^2$ at a pulse-reverse ratio of 1. To investigate the brightener concentration on the electroplating properties, the current density value was fixed at 3.0 A/$dm^2$ as a dense microstructure was achieved at this current density. The brightener concentration was varied from 0.05 to 0.3 ml/L to study the effect of the concentration. The optimum concentration for micro-bump electroplating was found to be 0.05 ml/L based on the examination of the electroplating properties of the bump shape, roughness and grain size.

Effects of Electroplating Condition on Micro Bump of Multi-Layer Build-Up PCB (다층 PCB 빌드업 기판용 마이크로 범프 도금에 미치는 전해조건의 영향)

  • Seo, Min-Hye;Hong, Hyun-Seon;Jung, Woon-Suk
    • Korean Journal of Materials Research
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    • v.18 no.3
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    • pp.117-122
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    • 2008
  • Micro-sized bumps on a multi-layered build-up PCB were fabricated by pulse-reverse copper electroplating. The values of the current density and brightener content for the electroplating were optimized for suitable performance with maximum efficiency. The micro-bumps thus electroplated were characterized using a range of analytical tools that included an optical microscope, a scanning electron microscope, an atomic force microscope and a hydraulic bulge tester. The optical microscope and scanning electron microscope analyses results showed that the uniformity of the electroplating was viable in the current density range of $2-4\;A/dm^2$; however, the uniformity was slightly degraded as the current density increased. To study the effect of the brightener concentration, the concentration was varied from zero to 1.2 ml/L. The optimum concentration for micro-bump electroplating was found to be 0.6 ml/L based on an examination of the electroplating properties, including the roughness, yield strength and grain size.

Reliability Studies on Cu/SnAg Double-Bump Flip Chip Assemblies for Fine Pitch Applications (미세피치용 Cu/SnAg 더블 범프 플립칩 어셈블리의 신뢰성에 관한 연구)

  • Son, Ho-Young;Kim, Il-Ho;Lee, Soon-Bok;Jung, Gi-Jo;Park, Byung-Jin;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.37-45
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    • 2008
  • In this study, reliabilities of Cu (60 um)/SnAg (20 um) double-bump flip chip assemblies were investigated for the flip chip interconnections on organic substrates with 100 um pitch. After multiple reflows at $250^{\circ}C\;and\;280^{\circ}C$, bump contact resistances were almost same regardless of number of reflows and reflow temperature. In the high temperature storage test, there was no bump contact resistance change at $125^{\circ}C$ up to 2000 hours. However, bump contact resistances slightly increased at $150^{\circ}C$ due to Kirkendall voids formation. In the electromigration test, Cu/SnAg double-bump flip chip assemblies showed no electromigration until about 600 hours due to reduced local current density. Finally, in the thermal cycling test, thermal cycling failure mainly occurred at Si chip/Cu column interface which was found out the highest stress concentration site in the finite element analysis. As a result, Al pad was displaced out under thermal cycling. This failure mode was caused by normal compressive strain acting Cu column bumps along perpendicular direction of a Si chip.

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Microwave Frequency Responses of Novel Chip-On-Chip Flip-Chip Bump Joint Structures (새로운 칩온칩 플립칩 범프 접합구조에 따른 초고주파 응답 특성)

  • Oh, Kwang-Sun;Lee, Sang-Kyung;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.12
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    • pp.1120-1127
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    • 2013
  • In this paper, novel chip-on-chip(CoC) flip-chip bump structures using chip-on-wafer(CoW) process technology are proposed, designed and fabricated, and their microwave frequency responses are analyzed. With conventional bumps of Cu pillar/SnAg and Cu pillar/Ni/SnAg and novel Polybenzoxazole(PBO)-passivated bumps of Cu pillar/SnAg, Cu pillar/Ni/SnAg and SnAg with the deposition option of $2^{nd}$ Polyimide(PI2) layer on the wafer, 10 kinds of CoC samples are designed and their frequency responses up to 20 GHz are investigated. The measurement results show that the bumps on the wafers with PI2 layers are better for the batch flip-chip process and have average insertion loss of 0.14 dB at 18 GHz. The developed bump structures for chips with fine-pitch pads show similar or slightly better insertion loss of 0.11~0.14 dB up to 18 GHz, compared with that of 0.13~0.17 dB of conventional bump structures in this study, and we find that they could be utilized in various microwave packages for high integration density.

Dimensional Syntheris and Kinematic Analysis of RSCS-SSP Spatial Mechanism with use of the Displacement Matrix Method (변위행렬법을 이용한 RSCS-SSP 공간기구의 치수합성과 운동해석)

  • 강희용
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 1997.04a
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    • pp.113-118
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    • 1997
  • This paper presents the dimensional synthesis and kinematic analysis of the RSCS-SSP motion generating spatial mechanism using the displacement matrix method. This type of spatial mechanisms is used for the Mcpherson suspension in small automobiles. It is modeled for the wheel bump/rebound and steering motion. First, the suspension is modeled as a multiloop spatial rigid body guidance mechanism for the two major motions. Then the design equations for SSP, RS, and SC strut links are applied to synthesize an RSCS-SSP for up to three prescribed positions for the steering motiom from the suspension design specification. Thus a RSCS-SSP mechanism which is synthesized is also analyzed for the displacement during the steering motion.

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A Study of the IMC Growth and Shear Strength of Solder Bump and TiW/Cu/electroplating Cu UBM (솔더범프와 TiW/Cu/electroplating Cu UBM 층과의 금속간 화합물 형성과 범프 전단력에 관한 연구)

  • 장의구;김남훈;김남규;엄준철
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.3
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    • pp.267-271
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    • 2004
  • The joint strength and fracture surface of Sn-Pb solder bump in photo diode packages after isothermal aging testing were studied experimentally. Cu/Sn-Pb solders were adopted, and aged for up to 900 hours at 12$0^{\circ}C$ and 17$0^{\circ}C$ to analyze the effect of intermetallic compound(IMC). In 900-hour aging experiments, the maximum shea strength of Sn-Pb solder decreased by 20% and 9%. The diffraction patterns of Cu$_{6}$Sn$_{5}$, scallop-shape IMC, and planar-shape Cu$_3$Sn were observed by Transmission Electron Microscopy (TEM).EM).

Kinematic Analysis on the Mogul Short Turn Motion in Interski (인터스키 부정지 숏턴 동작의 운동학적 분석)

  • Joo, Hyun-Sik;Park, Jong-Hoon;Lee, Gye-San;Kim, Won-Kyoung;Park, Jong-Chul;Back, Jin-Ho
    • Korean Journal of Applied Biomechanics
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    • v.18 no.4
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    • pp.67-76
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    • 2008
  • The purpose of this study was to analyze differences in kinematic variables for mogul short turn motion between superior and inferior group, so that it can explore more effective mogul short turn motions. To meet the goals, this study selected total 10 ski players who would participate in mogul short turn event of the National Technical Ski Championship 2007, so that it could analyze kinematic variables by way of 3D motion analysis using DLT method. As a result, this study came to the following conclusions; For total and phase-specific duration, it was found that superior group took shorter time than inferior group. Superior group's Center of Mass was stands for more high value in up-down movement skill than inferior group. However right-left movement scale was less than them. In this reason, superior group was made a straight descent at the same time made a fast front-rear velocity. In the part of up-down movement velocity show that move slowly in the drop-in phase while increased in the bump-up phase. It is show that superior group was less tinny than inferior group include joint angle and knee joint angle. However leaning angle of trunk and the body inclination angle were more high figured than inferior group. Leaning angle of lower limbs also showed high figure at the center mogul. Lastly, In the part of body torsion angle show that superior group was high figure direction of right turn in the drop-in phase while in bump-up phase, made a high figure direction of left turn.

Failure in the COG Joint Using Non-Conductive Adhesive and Polymer Bumps (감광성 고분자 범프와 NCA (Non-Conductive Adhesive)를 이용한 COG 접합에서의 불량)

  • Ahn, Kyeong-Soo;Kim, Young-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.1
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    • pp.33-38
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    • 2007
  • We studied a bonding at low temperature using polymer bump and Non-Conductive Adhesive (NCA), and studied the reliability of the polymer bump/Al pad joints. The polymer bumps were formed on oxidized Si substrates by photolithography process, and the thin film metals were formed on the polymer bumps using DC magnetron sputtering. The substrate used was AL metallized glass. The polymer bump and Al metallized glass substrates were joined together at $80^{\circ}C$ under various pressure. Two NCAs were applied during joining. Thermal cycling test ($0^{\circ}C-55^{\circ}C$, cycle/30 min) was carried out up to 2000 cycles to evaluate the reliability of the joints. The bondability was evaluated by measuring the contact resistance of the joints through the four point probe method, and the joints were observed by Scanning Electron Microscope (SEM). The contact resistance of the joints was $70-90m{\Omega}$ before the reliability test. The joints of the polymer bump/Al pad were damaged by NCA filler particles under pressure above 200 MPa. After reliability test, some joints were electrically failed since thinner metal layers deposited at the edge of bumps were disconnected.

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Formation Mechanisms of Sn Oxide Films on Probe Pins Contacted with Pb-Free Solder Bumps (무연솔더 범프 접촉 탐침 핀의 Sn 산화막 형성 기제)

  • Bae, Kyoo-Sik
    • Korean Journal of Materials Research
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    • v.22 no.10
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    • pp.545-551
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    • 2012
  • In semiconductor manufacturing, the circuit integrity of packaged BGA devices is tested by measuring electrical resistance using test sockets. Test sockets have been reported to often fail earlier than the expected life-time due to high contact resistance. This has been attributed to the formation of Sn oxide films on the Au coating layer of the probe pins loaded on the socket. Similar to contact failure, and known as "fretting", this process widely occurs between two conductive surfaces due to the continual rupture and accumulation of oxide films. However, the failure mechanism at the probe pin differs from fretting. In this study, the microstructural processes and formation mechanisms of Sn oxide films developed on the probe pin surface were investigated. Failure analysis was conducted mainly by FIB-FESEM observations, along with EDX, AES, and XRD analyses. Soft and fresh Sn was found to be transferred repeatedly from the solder bump to the Au surface of the probe pins; it was then instantly oxidized to SnO. The $SnO_2$ phase is a more stable natural oxide, but SnO has been proved to grow on Sn thin film at low temperature (< $150^{\circ}C$). Further oxidation to $SnO_2$ is thought to be limited to 30%. The SnO film grew layer by layer up to 571 nm after testing of 50,500 cycles (1 nm/100 cycle). This resulted in the increase of contact resistance and thus of signal delay between the probe pin and the solder bump.