• Title/Summary/Keyword: BJT

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The study on the Implementation of Philips Unified Mobility (Philips Unified 이동도 모델의 구현에 관한 연구)

  • Yoon, Seok-Seong;Yoon, Hyun-Min;Lee, Eun-Gu;Kim, Cheol-Sung
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.903-906
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    • 1999
  • 고 농도의 반송자가 존재하는 영역에서의 지배적인 산란 효과인 억셉터 및 도너 산란과 반송자-반송자 산란, Screening 효과를 수치적으로 구현하는 방법을 제안한다. 또한 높은 바이어스가 인가된 경우 Slotboom 변수를 사용함으로써 발생하는 부동 소숫점 한계를 극복하기 위한 척도변환 방법을 제안한다. 구현된 모델의 정확성을 검증하기 위해서 자체 개발된 소자 시뮬레이터인 BANDIS를 이용하여, 척도변환에 대해서 n-MOSFET 소자로 17〔V〕이상에서도 모의실험이 가능함을 보였고, 전력 BJT 소자에 대해서 Philips Unified 이동도 모델의 모의 실험 결과, 상업용 2차원 소자 시뮬레이터인 MEDICI에 비해 척도변환은 최대 12%, Philips Unified 이동도는 최대 2.8%이내의 상대오차를 보였다

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Switching-Mode BJT Driver for Self-Oscillated Push-Pull Inverters

  • Borekci, Selim;Oncu, Selim
    • Journal of Power Electronics
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    • v.12 no.2
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    • pp.242-248
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    • 2012
  • Self oscillating current fed push pull resonant inverters can be controlled without using special drivers. Dc current flows through the choke coil and the power switches, although the driving signals of the power switches are sinusoidal. When the base current is near zero, the transistors cannot be operated in switching mode. Hence higher switching power losses and instantaneous peak power during off transitions are observed. In this study, an alternative design has been proposed to overcome this problem. A prototype circuit has been built which provides dc bias current to the base of the transistors. Experimental results are compared with theoretical calculations to demonstrate the validity of the design. The proposed design decreases the peak and average power losses by about 8 times, when compared to conventional designs.

The Simplified Model For Switching Transient Characteristics Analysis Of SI Thyristor (Static Induction Thyristor의 시동특성해석)

  • Lee, Min-Keun;Park, Man-Su;Ko, Kwang-Cheol
    • Proceedings of the KIEE Conference
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    • 2006.07b
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    • pp.1219-1220
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    • 2006
  • 본 연구의 목적은 Pspice를 이용하여 SI Thyristor의 구조적인 특징과 스위칭 동작을 설명하면서도 비교적 간략화된 등가 모델을 개발하는 것에 있다. 이러한 목표로 등가모델은 SI Thyristor의 구조적 형태에 기반을 두어 BJT 소자를 이용한다. 또 게이트 구조와 스위칭 매커니즘을 고려한 MOSFET, Steady state Turn on 상태에서 dominant 모델인 PIN Diode로 구성되어 있다. 개발된 등가모델을 스너버회로와 함께 스위칭 과도응답을 시뮬레이션하였으며 그 결과는 실제 실험결과와 비교하여 검증하였다. 비교적 간단하게 고안된 회로를 통해 Turn On/Off 동작에서 스위칭 특성을 예측할 수 있으므로 펄스파워용 스위치로서 SI Thyristor의 시동특성을 해석하는 데 본 등가모델을 활용할 수 있을 것으로 전망한다.

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A Study on the Development of Dual-band PLL Frequency Synthesizer for miniature Repeater (초소형 중계기용 듀얼 밴드 주파수합성기 개발에 관한 연구)

  • 나영수;김진섭;강용철;변상기;나극환
    • Proceedings of the IEEK Conference
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    • 2003.11c
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    • pp.37-40
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    • 2003
  • The 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer has been developed for applications to the miniature repeater. The miniature dual-band repeater will be used at shopping mall, basements and underground parking lots. The in-loop 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer has been developed by designing Si BJT VCO and PLL loop circuits with Colpitts. The prototype of 1.63㎓, 2.33㎓ dual-band PLL frequency synthesizer of size 19${\times}$19${\times}$8(mm) has shown operating frequencies of 1.63㎓, 2.33㎓ ranges, RF output of 1dBm(PCS), 1dBm(IMT-2000), phase noise of -100 dBc/Hz(PCS), -95dBc/Hz(IMT-2000) at 10KHz offset, harmonics suppression of -24dB c(PCS), -15dBc(IMT-2000).

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Optimal Thermal Resistance Extraction Method for the Current Source Model of HBT (HBT의 전류원 모델을 위한 최적 열 저항값 추출 방법)

  • 서영석;김인성;송재성;남효덕
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.4
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    • pp.367-372
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    • 2004
  • Two new extraction methods for the thermal Resistance of HBT(Heterojunction Bipolar Transistors) are proposed. First, the analytical expression, based on the thermal characteristics that the base to emitter junction voltage drops with the increase of junction temperature, is derived. Second, the thermal resistance equation that can predict the measured DC(Direct Current) data optimally is derived. These optimal thermal resistance expression is applied to the 2 finger 2${\times}$20${\mu}{\textrm}{m}$-AlGaAs/GaAs HBT and shows the good agreement with the measured data.

Radiation Effects on the Power MOSFET for Space Applications

  • Lho, Young-Hwan;Kim, Ki-Yup
    • ETRI Journal
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    • v.27 no.4
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    • pp.449-452
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    • 2005
  • The electrical characteristics of solid state devices such as the bipolar junction transistor (BJT), metal-oxide semiconductor field-effect transistor (MOSFET), and other active devices are altered by impinging photon radiation and temperature in the space environment. In this paper, the threshold voltage, the breakdown voltage, and the on-resistance for two kinds of MOSFETs (200 V and 100 V of $V_{DSS}$) are tested for ${\gamma}-irradiation$ and compared with the electrical specifications under the pre- and post-irradiation low dose rates of 4.97 and 9.55 rad/s as well as at a maximum total dose of 30 krad. In our experiment, the ${\gamma}-radiation$ facility using a low dose, available at Korea Atomic Energy Research Institute (KAERI), has been applied on two commercially available International Rectifier (IR) products, IRFP250 and IRF540.

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The Worst-Case Optimal Design of An Interface Circuit for Satellite (Worst Case를 고려한 위성체 접속회로의 최적설계)

  • Lho, Yeung-Hwan;Lee, Sang-Yong
    • Journal of Institute of Control, Robotics and Systems
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    • v.8 no.2
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    • pp.136-141
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    • 2002
  • The electrical characteristics of solid state devices such as BJT(Bipolar Junction Transistor) and MOSFET, etc, are altered by impinging nuclear radiation and temperature in the space environment. This phenomenon is well known and has been studied extensively since the early 1960's when satellites were first being designed and used in the United States. However, the studies and the developments of radiation hardening technologies for the electronic components at the industrial fields in our country has not been popular so far. The worst case design technology in the electrical circuit is required for the appropriate operation of solid state devices in the space environment. In this paper, the interface circuit used in KOMPSAT(Korea Multipurpose Satellite), which is now being operated since the one was launched in 1999, is optimally designed to accomodate the worst case design and radiation effect.

A Study on analysis performance and The optimum parameter of RE Low Noise Amplifier Design (RF 저잡음증폭기(LNA) 설계 및 성능 분석과 최적 파라미터 도출에 관한 연구)

  • 류태영;이창식
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 2003.11a
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    • pp.481-486
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    • 2003
  • RF 전파는 신호레벨이 비교적 작고 간섭 현상에 매우 민감한 특성을 가지고 있다. 따라서 이러한 미소한 입력전파의 수신시 수신기 전체의 감도를 높이고 잡음을 줄일 목적으로 사용되는 고주파 증폭기가 저잡음 증폭기이다. 본 논문에서는 FET 증폭기를 이용한 LNA설계시 직렬 궤환에 의한 최소잡음과 최소입력정재파비의 최적 설계 파라미터를 검증한다. LNA의 기본적 특성 분석과 IMT-2000 구역의 1. 9GHZ대의 휴대단말기용 LNA와 블루투스용 2.4GHz대의 LNA 그리고, 지능형교통시스템에 응용되는 5.8GHz대의 단거리전용통신 LNA를 구현하고 각 주파수별로 특성이 다른 BJT, FET 증폭기를 적용하여 설계하고 성능 분석 및 최적의 파라미터를 도출하였다.

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밀리미터파 Transistors

  • 범진욱;송남진
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.2
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    • pp.2-11
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    • 2000
  • Technologies for high-speed transistors, active devices essential to the fabrication of millimeter wave circuits have developed drastically with the design and processing techniques. The high frequency transistors, made of GaAs or InP related compound semiconductors mainly, are in the form of MODFETs and HBTs. Other than traditional III-V compound semiconductor materials, SiGe and GaN technologies are emerging as viable candidates of millimeter-wave devices. In this paper, basis and applications of millimeter-wave transistors are introduced.

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Modified Low-Votlage CMOS Bandgap Voltage Reference with CTAT Compensation (개선된 CTAT 보상을 가지는 저전압 CMOS Bandgap Voltage Reference)

  • Kim, Jae-Bung;Cho, Seong-Ik
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.5
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    • pp.753-756
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    • 2012
  • In this paper, a modified low-votlage CMOS bandgap voltage reference with CTAT compensation is presented. The proposed structure doesn't use PTAT current. The proposed structure is more simple than the existing structure and doesn't use the eighteen BJT. The modified low-votlage CMOS bandgap voltage reference with CTAT compensation has been successfully verified in a standard 0.18um CMOS process. The simulation results have confirmed that, with the minimum supply voltage of 1.25V, the output reference voltage at 549mV has a temperature coefficient of 12$ppm/^{\circ}C$ from $0^{\circ}C$ to $100^{\circ}C$.