• 제목/요약/키워드: BCD

검색결과 133건 처리시간 0.04초

A Hybrid Decimal Division Algorithm

  • Kwon Soonyoul;Choi Jonghwa;Park Jinsub;Han Seonkyoung;You Younggap
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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    • pp.225-228
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    • 2004
  • This paper presents a hybrid decimal division algorithm to improve division speed. In a binary number system, non-restoring algorithm has a smaller number of operations than restoring algorithm. In decimal number system, however, the number of operations differs with respect to quotient values. Since one digit ranges 0 to 9 in decimal, the proposed hybrid algorithm employ either non-restoring or restoring algorithm on each digit to reduce iterative operations. The selection of the algorithm is based on the remainder values. The proposed algorithm improves computation speed substantially over conventional algorithms by decreasing the number of operations.

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Design of a Latchup-Free ESD Power Clamp for Smart Power ICs

  • Park, Jae-Young;Kim, Dong-Jun;Park, Sang-Gyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권3호
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    • pp.227-231
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    • 2008
  • A latchup-free design based on the lateral diffused MOS (LDMOS) adopting the "Darlington" approaches was designed. The use of Darlington configuration as the trigger circuit results in the reduction of the size of the circuit when compared to the conventional inverter driven RC-triggered MOSFET ESD power clamp circuits. The proposed clamp was fabricated using a $0.35{\mu}m$ 60V BCD (Bipolar CMOS DMOS) process and the performance of the proposed clamp was successfully verified by TLP (Transmission Line Pulsing) measurements.

LED 구동 IC를 위한 레벨 시프터 방식의 전하펌프 회로 설계 (Design of a Charge Pump Circuit Using Level Shifter for LED Driver IC)

  • 박원경;박용수;송한정
    • 한국전기전자재료학회논문지
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    • 제26권1호
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    • pp.13-17
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    • 2013
  • In this paper, we designed a charge pump circuit using level shifter for LED driver IC. The designed circuit makes the 15 V output voltage from the 5 V input in condition of 50 kHz switching frequency. The prototype chip which include the proposed charge pump circuit and its several internal sub-blocks such as oscillator, level shifter was fabricated using a 0.35 um 20 V BCD process technology. The size of the fabricated prototype chip is 2,350 um ${\times}$ 2,350 um. We examined performances of the fabricated chip and compared its measured results with SPICE simulation data.

An Charge-Recycling Technique with Dual Outputs for Field Color Sequential applied in the RGB LED Backlight

  • Yang, Chih-Yu;Hsieh, Chun-Yu;Chen, Ke-Horng
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1088-1091
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    • 2009
  • A boost converter with charge-recycling technique fabricated by $0.25{\mu}m$ CMOS BCD process can provide different supply voltages to drive series RGB LEDs in sequence for reducing the power consumption on the constant current generator. The proposed technique stores and restores extra energy to improve the efficiency, as well as enhances the reference tracking response. Experimental results show that the period of reference-tracking response can be improved. When the load current is 100mA, the periods of reference down-tracking and uptracking are smaller than $10{\mu}s$ and $20{\mu}s$, respectively. Experimental results demonstrate fast and efficient reference tracking performance is achieved.

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5.8GHz 대역의 무선LAN용 CPW급전 마이크로스트립 하이브리드 슬롯 안테나 설계 및 제작 (Design and Fabrication of Microstrip Hybrid Slot Antenna Fed by CPW for Wireless LAN at 5.8GHz Band)

  • 고수미;이권익;김홍수
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(1)
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    • pp.175-178
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    • 2002
  • In This paper, a microstrip slot antenna is designed and fabricated for wireless LAN at 5.8GHz band. The microstrip slot antenna is fed by CPW and formed the inductively slot and tile capacitively slot. To obtain wideband, the inductively slot is designed at 5.3GHz and the capacitively slot is designed at 5.8GHz. Resonant frequency of the fabricated microstrip slol antenna is 5.BCD, the bandwidth for VS%<1.5 is 29% and the gain is 4.6dB. The 3-dB beamwidth of E-plane and H-plane is 80 “ and 120 ”, respectively

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A Direct AC Driver with Reduced Flicker for Multiple String LEDs

  • Kim, Junsik;Park, Shihong
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제15권3호
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    • pp.390-396
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    • 2015
  • This paper proposes a method to reduce flicker when running an AC-power direct-drive type multiple string LED driver IC. The proposed method greatly decreases flicker using one capacitor and P-type MOSFET transistor (PMOS). The flicker index (FI) was reduced by over 40% through experiments, and less than half of the conventional external components are used in the passive valley fill circuit, which gives an advantage in the cost and utilization in the design of LED lighting modules. The 0.35 um 700 V BCD process was used to manufacture this LED driver.

A STUDY OF A TIDALLY INTERACTING BCD PAIR: ESO 435-IG20 AND ESO435-IG16

  • KIM, JINHYUB;SUNG, EON-CHANG;CHUNG, AEREE;STAVELEY-SMITH, LISTER
    • 천문학논총
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    • 제30권2호
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    • pp.513-515
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    • 2015
  • We investigate $H\small{I}$ data for a pair of blue compact dwarf galaxies (BCDs), ESO 435-IG20 and ESO 435-IG16, obtained with the Australia Telescope Compact Array. The outer $H\small{I}$ disk is highly disturbed and asymmetric in both galaxies showing a gas tail and/or a broad/extended gas disk on only one side. Based on their low-density surroundings and small projected distance (<80 kpc) at a similar redshift, we conclude that tidal interaction between these two BCDs is responsible for the morphological and kinematical peculiarities in $H\small{I}$. We also investigate their star formation rates using $H{\alpha}$ and UV imaging data to probe their interaction history.

전류방식기법에 의한 다치론이계의 구성에 관한 연구 (A Study on the Synthesis of Multivalued Logic System Using Current-Mode Techniques)

  • 한만춘;신명철;박종국;최정문;김락교;이래호
    • 전기의세계
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    • 제28권1호
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    • pp.43-52
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    • 1979
  • Recently, interest in multivalued(MV) logic system has been increased, despites the apparent difficulties for practical application. This is because of the many advantages of the MV compared with the 2-valued logic systems, such as; (a) higher speed of arithmetical operation on account of the smaller number of digits required for a given data, (b) better utilization of data transmission channels on account of the higher information contents per line, (c) potentially higher density of information storage. This paper describes a MV switching theory and experimental MV logic elements based on current-mode logic technique. These elements tried were a 3-stable pulse generator, a ternary AND, a ternary OR, a MT circuit and a ternary inverter. Tristable flops which are indispensable for constituting a ternary shift register are synthesized using these gates. A BCD to TCD decoder, and vice versa, are proposed by using a ternary inverter and some binary gates. Thus, the feasibility of a large scale MV digital system has been demonstrate.

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Electrical Characteristics and Thermal Reliability of Stacked-SCRs ESD Protection Device for High Voltage Applications

  • Koo, Yong Seo;Kim, Dong Su;Eo, Jin Woo
    • Journal of Power Electronics
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    • 제12권6호
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    • pp.947-953
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    • 2012
  • The latch-up immunity of the high voltage power clamps used in high voltage ESD protection devices is very becoming important in high-voltage applications. In this paper, a stacking structure with a high holding voltage and a high failure current is proposed and successfully verified in 0.18um CMOS and 0.35um BCD technology to achieve the desired holding voltage and the acceptable failure current. The experimental results show that the holding voltage of the stacking structure can be larger than the operation voltage of high-voltage applications. Changes in the characteristics of the stacking structure under high temperature conditions (300K-500K) are also investigated.

Construction of a Dynamic Laser Light Scattering System Using a Personal Computer$^\dag$

  • Kim, Myung-Joong;Lee, Sang-Yong;Chung, Koo-Soon;Lee, Hoo-Sung
    • Bulletin of the Korean Chemical Society
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    • 제8권5호
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    • pp.403-405
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    • 1987
  • A dynamic laser light scattering system has been constructed using a personal computer. The intensity of the scattered light was detected with a photomultiplier tube and a photon counter. The BCD output of the photon counter which is proportional to the intensity of scattered light is fed into a personal computer via an interface card. The personal computer was programmed as an autocorrelator in machine language. The data acquisition rate of the system was about 600 samples/s which is adequate for studies on the molecular dynamics of concentrated polymer solutions, polymer latices with large particle size, and polymer glass systems. The constructed system was tested with polystyrene latex and the measured diameter of the latex particle agrees well with the supplier's value.