• 전기학회논문지
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• 제61권2호
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• pp.324-328
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• 2012

A recovered jitter of CDR(Clock and Data Recovery) Circuit based on Dual-loop DLL(Delay Locked Loop) for data recovery in high speed serial data communication is changed by depending on the input data and reference clock frequency. In this paper, 2-step DPC which has constant jitter performance for wide-range input frequency is proposed. The designed prototype 2-step CDR using proposed 2-step DPC has operation frequency between 200Mbps and 4Gbps. Average delay step of 2-step DPC is 10ps. Designed CDR circuit was tested with 0.18um CMOS process.

• ETRI Journal
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• 제24권6호
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• pp.473-476
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• 2002

This letter proposes an efficient kernel-based partitioning algorithm for reducing area and power dissipation in combinational circuit designs using don't-care sets. The proposed algorithm decreases power dissipation by partitioning a given circuit using a kernel extracted from the logic. The proposed algorithm also reduces the area overhead by minimizing duplicated gates in the partitioned sub-circuits. The partitioned subcircuits are further optimized utilizing observability don't-care sets. Experimental results for the MCNC benchmarks show that the proposed algorithm synthesizes circuits that on the average consume 22.5% less power and have 12.7% less area than circuits generated by previous algorithms based on a precomputation scheme.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.187-189
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• 2003

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic content. Typically, these SMPS have a power factor lower than 0,65. To improve with this problem the power factor correction(PFC) circuit of power supplies has to be introduced. Specially. to the reduce size and manufacture cost of power conversion device, the single-stage PFC converter is increased to demand as necessary of study. in this paper, The comparative analysis of power factor correction circuit using Feedforward control with average current mode flyback converter(single-stage) and boost converter(two-stage). Also, the validity of designed and manufactured high power factor flyback converter and boost converter is confirmed by simulation and experimental results.

• Journal of electromagnetic engineering and science
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• 제5권2호
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• pp.97-103
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• 2005

This paper describes the measured results of sonobuoy transmitting antenna system for anti-submarine warfare (ASW). Since radiation pattern and power density depend on impedance matching between transmitting RF part and antenna with termination resistance, design of matching circuit is very important for sonobuoy system performance. Matching circuit is designed by Smith chart using control of L and C. In standing wave ratio(SWR) measurement using Network Analyzer, SWR of antenna with matching circuit observed 1.5 below at the assigned VHF band. It shows very excellent performance comparison with conversional product that is used for the same object. The measured vertical and horizontal radiation patterns are also shown the satisfaction of military specifications. A drop out of sonobuoy system on the sea is happened when angle of elevation direction is over 10 degrees, and it is conformed that it takes less than I second return to original signal level. The required electric power density is $83\;mW/m^2$ in the military specification, and measured electric power density is observed over average $110\;mW/m^2$ at all frequency bands.

• Journal of Electrical Engineering and Technology
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• 제6권2호
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• pp.270-274
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• 2011

This paper presents a parameterized simulation program with integrated circuit emphasis (SPICE) model of a two-level microbolometer based on negative-temperature-coefficient thin films, such as vanadium oxide or amorphous silicon. The proposed modeling begins from the electric-thermal analogy and is realized on the SPICE modeling environment. The model consists of parametric components whose parameters are material properties and physical dimensions, and can be used for the fast design study, as well as for the co-design with the readout integrated circuit. The developed model was verified by comparing the obtained results with those from finite element method simulations for three design cases. The thermal conductance and the thermal capacity, key performance parameters of a microbolometer, showed the average difference of only 4.77% and 8.65%, respectively.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 추계학술대회 논문집
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• pp.149-152
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• 2001

A Single-phase bi-directional inverter Using a diode bridge-type resonant circuit to implement ZVT(Zero Voltage Transition) switching is Presented. It is shown that the ZACE(Zero Average Current Error) algorithm based polarized ramptime current control can provide a suitable interface between diode bridge-type resonant circuit DC link and the inverter. The current control algorithm is analyzed about how to design the circuit with analyzed switch which m ZVT operation for the main power switch The simulation and experimental results would be shown to verify the proposed current algorithm, because the main power switch is turn on with ZVT and the bi-directional inverter is operated.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.388-391
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• 1999

This Paper presents an efficient algorithm that minimizes the area of the combinational system through cell replacement. During the minimization, it maintains the circuit speed same. For the minimization, the proposed algorithm defines the criticality of each cell, based on the critical delay and the number of paths passing through the cell. Then, it visits the cells of the system, one by one, from the one with the lowest criticality, and replaces it with the minimum area cell that satisfies the delay constraint. Experimental results, using the LGsynth91 benchmark circuits synthesized by misII, show that the proposed algorithm reduces the circuit area further by 17.54% on the average without sacrificing the circuit speed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 B
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• pp.1214-1216
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• 2004

Conventional Switched Mode Power Supplies(SMPS) with diode-capacitor rectifier have distorted input current waveform with high harmonic contents. Typically, these SMPS have a power factor lower than 0,65. To improve with this problem the power factor correction(PFC) circuit of power supplies has to be introduced. PFC circuit have tendency to be applied in new power supply designs. The input active power factor correction circuits can be implemented using either the two-stage or the single-stage approach. In this paper, the comparative analysis of power factor correction circuit using feedforward control with average current mode single-stage flyback method converter and two-stage converter which is combination of boost and flyback converter. The two prototypes of 50W were designed and tested a laboratory experimental. Also, the comparative analysis is confirmed by simulation and experimental results.

• 대한전기학회논문지:시스템및제어부문D
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• 제50권1호
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• pp.45-50
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• 2001

With increasing complexity of digital logic circuits, fast and accurate verification of functional behaviour becomes most critical bottleneck in meeting time-to-market requirement. This paper presents several techniques for accelerating a cycle-based logic simulation. The acceleration techniques include parallel pattern logic evaluation, circuit size reduction, and the partition of feedback loops in sequential circuits. Among all, the circuit size reduction plays a critical role in maximizing logic simulation speedup by reducing 50% of entire circuit nodes on the average. These techniques are incorporated into a levelized table-driven logic simulation system rather than a compiled-code simulation algorithm. Finally, experimental results are given to demonstrate the effectiveness of the proposed acceleration techniques. Experimental results show more than 27 times performance improvement over single pattern levelized logic simulation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.880-882
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• 1993

In this paper, a drive circuit for a bifilar-wound hybrid step motor considering mutual inductance and back-emf is investigated. For the suppression circuit, the varition of average torque and torque ripple due to the effect of mutual inductance and back-emf is presented. In order to improve the performance of the motor, a new control scheme is also proposed.