• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.8B
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• pp.1460-1468
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• 2000

The goal of this research is the real-time implementation of MPEG-1 Layer III audio decoder using the fixed-point digital signal processor of TMS320C6201 The main job for this work is twofold: one is to convert floating-point operation in the decoder into fixed-point operation while maintaining the high resolution, and the other is to optimize the program to make it run in real-time with memory size as small as possible. We, especially, devote much time to the descaling module in the decoder for conversion of floating-point operation into fixed-point operation with high accuracy. The inverse modified cosine transform(IMDCT) and synthesis polyphase filter bank modules are optimized in order to reduce the amount of computation and memory size. After the optimization process, in this paper, the implemented decoder uses about 26% of maximum computation capacity of TMS320C6201. The program memory, data ROM, data RAM used in the decoder are about 6.77kwords, 3.13 kwords and 9.94 kwords, respectively. Comparing the PCM output of fixed-point computation with that of floating-point computation, we achieve the signal-to-noise ratio of more than 60 dB. A real-time operation is demonstrated on the PC using the sound I/O and host communication functions in the EVM board.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.4 s.304
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• pp.167-176
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• 2005

This paper proposes a new power minimization technique for the frame-based multimedia signal processing. The derivation of the technique is based on the newly proposed microscopic DVS(Dynamic Voltage Scaling) method, where, the operating frequency and the supply voltage levels are dynamically controlled according to the processing requirement for each frame of multimedia data. The multimedia signal processing algorithms are also redesigned and optimized to maximize the power saving efficiency of the microscopic DVS technology. The characterization of the mean/variance distribution of the processing load in the frame-based multimedia signal processing provides the major basis not only for the optimized application of the microscopic DVS technology but also for the optimization of the multimedia algorithms. The power saying efficiency of the proposed DVS approach is experimentally tested with the algorithms of MPEG-2 video decoder and MPEG-2 AAC audio encoder on the ARM9 RISC processor. The experimental results with the diverse MPEG-2 video and audio files show The average power saving efficiencies of 50$\%$ and 30$\%$, respectively. The results also agree very well with those of the analytic derivations.

• The Journal of the Acoustical Society of Korea
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• v.21 no.3
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• pp.237-244
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• 2002

In this paper we mention the optimization of MPEG-4 VM (Moving Picture Expert Group-4 Verification Model) GA (General Audio) AAC (Advanced Audio Coding) encoder and the design of the decoder for PDA (Personal Digital Assistant) using MPEG-4 VM source. We profiled the VMC source and several optimization methods have applied to those selected functions from the profiling. Intel Pentium III 600 MHz PC, which uses windows 98 as OS, takes about 20 times of encoding time compared to input sample running time, with additional options, and about 10 times without any option. Decoding time on PDA was over 35 seconds for the 17 seconds input sample. After optimization, the encoding time has reduced to 50% and the real time decoding has achieved on PDA.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.361-363
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• 2005

본 논문에서는 MPEG-4 Version2 Audio 표준에 근거하여 낮은 연산부담을 갖는 독자적인 엘고리즘을 적용한 MPEG-4 BSAC Audio 디코더를 개발하였다. 개발된 BSAC 디코더는 32bit RISC 구조를 갖는 Intel Xscale Processor 기반 시스템에 최적화하여 구현 및 평가를 수행하였다. 수행속도 증가 및 연산 정밀도 향상을 위해 각 기능 블록별 기능 및 구현 원리 연구와 32 bit 연산 구조를 파악하여, 이를 고정소수점 연산 구조로 구현함으로써 성능을 향상시켰다. 유한비트에 따른 오차 영향을 최소화하기 위해 데이터의 표현 범위에 대한 연구를 통해 근사한 오차를 최소화 하여 연산 정밀도를 향상 시키고자 하였다. 비선형 양자화기 및 filter bank 등 상대적으로 높은 연산 부담을 갖는 기능 블록은 Table look-up, 보간법, 지수연산 제거, pre/post scrambling 기법 등을 적용하여 최적화 하였다. 최종적으로 개발된 BSAC 디코더는 32 bit 연산 구조의 X-scale 프로세서를 탑재한 Development Board와 WindowsCE OS로 구성된 타겟 system에 이식하여 performance 평가하였으며, 높은 연산 정밀도 및 다른 수행속도를 확인할 수 있었다. 주관적인 청각 평가에서도 MPEG-4 reference 디코더와의 음원의 차이가 거의 없음을 확인하였다.

• The Journal of the Acoustical Society of Korea
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• v.16 no.3E
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• pp.56-61
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• 1997

In this paper, we describe a real-time implementation of a multi-channel auido codec system that is based on the MPEG-1 audio algorithm. The major feature of this system is that it has a flexible multi-DSP system that can be adapted for various applications with using up to four TMS320C40 DSPs. The purpose of this paper is to present the problems of the system and is to describe the optimized methods to solve the problems in the view of hardware and software. Our audio codec is composed of an encoder an a decoder system and the bit rate of bitstream is up to 384 kbps. Fast input/output interfaces, DSP overloads, and inter-DSP communications methods with high speed are considered in multi-DSP H/W. Also, to run real-time in S/W, optimizing methods of algorithm are considered. After implementation of system, the subjective assessment method, and 'triple stimulus/hidden reference/double blind' that recommended by ITU-R TG10/3 is adopted for the quality of our system. All test items except one are awarded difference grades(diffgrade) better than 1-. Form the results, multi-channel audio system can be used for HDTV service.

• The Journal of the Acoustical Society of Korea
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• v.22 no.7
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• pp.592-602
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• 2003

This paper aims to describe the basic structure of novel object-based 3D audio broadcasting system To overcome current uni-directional audio broadcasting services, the object-based 3D audio broadcasting system is designed for providing the ability to interact with important audio objects as well as realistic 3D effects based on the MPEG-4 standard. The system is composed of 6 sub-modules. The audio input module collects the background sound object, which is recored by 3D microphone, and audio objects, which are recorded by monaural microphone or extracted through source separation method. The sound scene authoring module edits the 3D information of audio objects such as acoustical characteristics, location, directivity and etc. It also defines the final sound scene with a 3D background sound, which is intended to be delievered to a receiving terminal by producer. The encoder module encodes scene descriptors and audio objects for effective transmission. The decoder module extracts scene descriptors and audio objects from decoding received bistreams. The sound scene composition module reconstructs the 3D sound scene with scene descriptors and audio objects. The 3D sound renderer module maximizes the 3D sound effects through adapting the final sound to the listner's acoustical environments. It also receives the user's controls on audio objects and sends them to the scene composition module for changing the sound scene.

• ETRI Journal
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• v.31 no.3
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• pp.336-338
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• 2009

This letter proposes a complexity reduction method to speed up the noiseless decoding of a bit-sliced arithmetic coding (BSAC) decoder. This scheme fully utilizes the group of consecutive arithmetic-coded symbols known as the decoding band and the significance tree structure sorted in order of significance at every decoding band. With the same audio quality, the proposed method reduces the number of calculations that are performed during the noiseless decoding in BSAC to about 22% of the amount of calculations with the conventional full-search method.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.261-262
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• 2007

This paper proposes a new IFFT(Inverse Fast Fourier Transform) algorithm, which is proper for IMDCT(Inverse Modified Discrete Cosine Transform) of MPEG-2 AAC(Advanced Audio Coding) decoder. The IFFT used in $2^N$-point IMDCT employ the bit-reverse data arrangement of inputs and N/4-IFFT to reduce the calculation cycles. We devised a new data arrangement algorithm of IFFT input and N/$4^{n+1}$-IFFT and can reduce multiplication cycles, addition cycles, and ROM size.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 1999.11b
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• pp.173-178
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• 1999

The Trellis Coded Modulation(TCM) allows the considerable achievements of coding gains compare with conventional multi-level modulation without compromising bandwidth efficiency. In this paper, we are presented a design of the parallel Viterbi decoder for 16-QAM TCM decoder with large constraint length (K=9), which can be applicable for the Digital Audio Broadcasting(DAB) receiver. As a mid-term result, a parallel Branch Metric Calculator (BMC)can compute 16 BMs within 3 clocks and a parallel 16 Add-Compare-Selects (ACS) unit can compute in a single clock. And also, two 256 Path Metric Memories (PMM) 32 Trace Back(TB) memories are specially designed with shuffle exchange switches for 16 parallel accesses. As a VHDL simulation, we can find the correctness of proposed model, which can be operated 16 S per symbol. Now, we are performing the hardware reduction for realtime operation and FPGA implementation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.6B
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• pp.1060-1067
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• 2000

MPEG-4 visual coding is an object-based system. The current video coding standards, H.261, MPEG-1, and MPEG-2 encode frame by frame. On the other hand, MPEG-4 separately encodes several objects, such as video objects and audio objects, in the same frame. Each transmitted object is decoded and composed in one frame. Shape coding is a process of coding visual objects in a frame. In this paper we present conformance test method for MPEG-4 shape decoders. This paper reviews the basic shape decoding standard, and proposes conformance test methods for BAB type decoder, and CAE decoder for intra and inter VOPs. Our test generates all possible cases of shape motion vector difference and context.