• Journal of information and communication convergence engineering
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• v.13 no.3
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• pp.145-151
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• 2015

We describe in this paper a hardware-based improvement scheme of a real-time automatic speech recognition (ASR) system with respect to speed by designing a parallel feature extraction algorithm on a Field-Programmable Gate Array (FPGA). A computationally intensive block in the algorithm is identified implemented in hardware logic on the FPGA. One such block is mel-frequency cepstrum coefficient (MFCC) algorithm used for feature extraction process. We demonstrate that the FPGA platform may perform efficient feature extraction computation in the speech recognition system as compared to the generalpurpose CPU including the ARM processor. The Xilinx Zynq-7000 System on Chip (SoC) platform is used for the MFCC implementation. From this implementation described in this paper, we confirmed that the FPGA platform is approximately 500× faster than a sequential CPU implementation and 60× faster than a sequential ARM implementation. We thus verified that a parallelized and optimized MFCC architecture on the FPGA platform may significantly improve the execution time of an ASR system, compared to the CPU and ARM platforms.

• Journal of the Korean Society for Railway
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• v.7 no.2
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• pp.137-141
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• 2004

A series of filed tests have been performed to investigate the aerodynamic effects on platform of the railway station during the passage of train that can be unpleasant and even dangerous to the pedestrians. To assess the aerodynamic effects on the platform, two aerodynamic properties has been measured; one is the wind gust induced by the train and the other is the pressure pulses generated when the nose and the tail of train passes. To measure these aerodynamic properties during the train passage, an array of hot-wire type anemometers and several sets of pressure transducers have been used, respectively. This paper deals with the filed test on conventional railway at about 100km/h operational speed, in which total 34 measurements has been made at the Bugok station in Seoul-Busan line for Saemaul-ho and Mugungwha-ho train. The results showed dramatic differences in the aerodynamic features between the two trains that are supposed to originate from the contrasting nose shapes of the trains.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.1
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• pp.20-26
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• 2021

Recent systems contain hardware and software components together for faster execution speed and less power consumption. In conventional hardware and software co-design, the ratio of software and hardware was divided by the designer's empirical knowledge. To find optimal results, designers iteratively reconfigure accelerators and applications and simulate it. Simulating iteratively while making design change is time-consuming. In this paper, we propose a hardware and software co-design platform for energy-efficient FPGA accelerator design. The proposed platform makes it easy for designers to find an appropriate hardware ratio by automatically generating application program code and hardware code by parameterizing the components of the accelerator. The co-design platform based on the Vitis unified software platform runs on a server with Xilinx Alveo U200 FPGA card. As a result of optimizing the multiplication accelerator for two matrices with 1000 rows, execution time was reduced by 90.7% and power consumption was reduced by 56.3%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.10
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• pp.1166-1172
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• 2012

In this paper, by using a commercial EM simulator, we could obtain the array manifold which are phase responses of an array antenna for the incident plane wave and then verified the effectiveness of methodology after comparing with the measurement. The result shows that the array manifold can be calculated including not only the phase response of the ideal point sources but also the influences of the mutual coupling between antennas and the installed platform. Also it can exclude the interference of strong broadcasting signal and the disturbance of the multipath in the calibration process. Finally, to predict the performances of direction finding systems, a novel method using both the EM simulation-based receiving signal and the sparsely sampled array manifold with the parabolic estimation is proposed. This method can be utilized in the various fields of direction-finding since it shows the superior predictive performance even in low SNR conditions.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.42 no.12
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• pp.1057-1064
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• 2014

The satellite on geostationary orbit accommodates multiple payloads into a single spacecraft platform and launched in June 26, 2010. The electrical power required to the satellite during sunlight is generated by a solar array wing. The solar cells are the GaInP/GaAs/Ge Triple Junction cells named Gaget2 cells from RWE Space, which were based on a Spectrolab epitaxy. This paper evaluates solar array power performance at end of design life based on the trend analysis results for the flight data on geostationary orbit. The estimated solar array power performance at end of design life compares with the power performance provided by solar array manufacturer. The solar cells show nominal behavior without significant degradation through the trend analysis results.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1335-1338
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• 2002

This paper presents the analysis of the required limit on a multibeam active phased array antenna (APAA) aperture using the statistical simulation for a High Altitude Platform Station (HAPS). The simulation takes into account the random errors caused by the non-identity of the array elements and the inaccuracy of the antenna calibration. The results of our statistical simulation show that the strict requirements on the sidelobe envelope for HAPSs can be met when the amplitude and phase distribution errors are minor, a condition which may be achieved by using digital beam forming.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.12
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• pp.2385-2390
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• 2009

Based on the detailed analysis of output characteristics of PV array and residential load usage pattern, a design method to calculate optimal battery capacity for stand-alone PV generation systems is proposed. And also, according to power flow Actual irradiation and temperature data are analyzed to compose a PV array simulator and also six representative home appliances are electrically modeled for load simulator, along with 24hours usage pattern. The surplus and insufficient power can be calculated from the proposed simulation platform, so that selection of an optimal battery capacity can be possible. The theoretical analysis and design process will be explained, along with informative simulation results.

• Molecules and Cells
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• v.45 no.2
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• pp.76-83
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• 2022

Neurons-on-a-Chip technology has been developed to provide diverse in vitro neuro-tools to study neuritogenesis, synaptogensis, axon guidance, and network dynamics. The two core enabling technologies are soft-lithography and microelectrode array technology. Soft lithography technology made it possible to fabricate microstamps and microfluidic channel devices with a simple replica molding method in a biological laboratory and innovatively reduced the turn-around time from assay design to chip fabrication, facilitating various experimental designs. To control nerve cell behaviors at the single cell level via chemical cues, surface biofunctionalization methods and micropatterning techniques were developed. Microelectrode chip technology, which provides a functional readout by measuring the electrophysiological signals from individual neurons, has become a popular platform to investigate neural information processing in networks. Due to these key advances, it is possible to study the relationship between the network structure and functions, and they have opened a new era of neurobiology and will become standard tools in the near future.

• International Journal of Automotive Technology
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• v.8 no.6
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• pp.753-760
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• 2007

In this paper, a roll and pitch estimation algorithm using a set of accelerometers and wireless sensor networks(S/N) is presented for use in a passenger vehicle. While an inertial measurement unit(IMU) is generally used for roll/pitch estimation, performance may be degraded in the presence of longitudinal acceleration and yaw motion. To compensate for this performance degradation, a new roll and pitch estimation algorithm is proposed that uses an accelerometer array, global positioning system(GPS) and in-vehicle networks to get information from yaw rate and roll rate sensors. Angular acceleration and roll and pitch approximation are first calculated based on vehicle kinematics. A discrete Kalman filter is then applied to estimate both roll and pitch more precisely by reducing noise from the running engine and from road disturbance. Finally, the feasibility of the proposed algorithm is shown by comparing its performance experimentally with that of an IMU in the framework of an indoor test platform as well as a test vehicle.

• Journal of the Korea Institute of Military Science and Technology
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• v.24 no.5
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• pp.519-526
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• 2021

In this paper, an array antenna for LOS datalink for mounting UAV(Unmanned Aerial Vehicle) of low-probability of intercept is presented. For low RCS, radome was designed by conformal form, and other components were inserted into the UAV. The antenna of the transmitter and receiver are each composed of 12×12 array antennas, and include a beam steering function by controlling the phase of the unit element for the Uni-directional pattern and the Bi-directional pattern. As a result of the measurement of the manufactured antenna, it was confirmed that all the required specifications were met, and the installing possibility of the UAV platform on low-probability of intercept in the future was confirmed.