• Journal of Microbiology and Biotechnology
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• 제16권8호
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• pp.1229-1235
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• 2006

A lab-on-a-chip (LoC) was designed for simultaneous monitoring of microorganisms, antibiotic residues, somatic cells, and pH in raw milk. The LoC was fabricated from polydimethylsiloxane (PDMS) using microelectromechanical system (MEMS) technology, which consisted of two parts; a protein array and microchannel. The protein array was fabricated by immobilizing five types of antibodies corresponding to two microorganisms, two antibiotic residues, and somatic cells. A sol-gel film was deposited on a glass substrate to immobilize the antibodies. The target analytes in raw milk could be bound with the corresponding antibody by an immunoreaction, and the antigen-antibody complex was detected using fluorescence microscopy. SNARF-dextran was used as a pH indicator, and the SNARF-entrapped hydrogel was attached to the microchannel in the chip. After injecting the milk sample into the channel, the pH was measured by monitoring the change in fluorescence intensity by fluorescence microscopy. The on-chip simultaneous assay of two microorganisms (E. coli O157:H7 and Streptococcus agalactiae), two antibiotic residues (penicillin G and dihydrostreptomycin), and neutrophils was successfully accomplished using the proposed LoC system.

• 대한의용생체공학회:의공학회지
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• 제31권4호
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• pp.292-301
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• 2010

To restore visual sensation of blind patients, we have proposed a fully implantable retinal prosthesis comprising an three dimensionally (3D) stacked retinal chip for transforming optical signal to electrical signal, a flexible cable with stimulus electrode array for stimulating retina cells, and coupling coils for power transmission. The 3D stacked retinal chip is consisted of several LSI chips such as photodetector, signal processing circuit, and stimulus current generator. They are vertically stacked and electrically connected using 3D integration technology. Our retinal prosthesis has a small size and lightweight with high resolution, therefore it could increase the patients` quality of life (QOL). For realizing the fully implantable retinal prosthesis, we developed a retinal prosthesis module comprising a retinal prosthesis chip and a flexible cable with stimulus electrode array for generating optimal stimulus current. In this study, we used a 2D retinal chip as a prototype retinal prosthesis chip. We fabricated the polymide-based flexible cable of $20{\mu}m$ thickness where 16 channels Pt stimulus electrode array was formed in the cable. Pt electrode has an impedance of $9.9k{\Omega}$ at 400Hz frequency. The retinal prosthesis chip was mounted on the flexible cable by an epoxy and electrically connected by Au wire. The retinal prosthesis chip was cappted by a silicone to pretect from corrosive environments in an eyeball. Then, the fabricated retinal prosthesis module was implanted into an eyeball of a rabbit. We successfully recorded electrically evoked potential (EEP) elicited from the rabbit brain by the current stimulation supplied from the implanted retinal prosthesis module. EEP amplitude was increased linearly with illumination intensity and irradiation time of incident light. The retinal prosthesis chip was well functioned after implanting into the eyeball of the rabbit.

• 전기학회논문지
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• 제64권12호
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• pp.1730-1736
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• 2015

This paper presents a 16-channel transimpedance amplifier (TIA) array implemented in a standard $0.18-{\mu}m$ CMOS technology for the applications of panoramic scan LADAR (PSL) systems. Since this array is the front-end circuits of the PSL systems to recover three dimensional image for unmanned vehicles, low-noise and high-gain characteristics are necessary. Thus, we propose a voltage-mode inverter TIA (I-TIA) array in this paper, of which measured results demonstrate that each channel of the array achieves $82-dB{\Omega}$ transimpedance gain, 565-MHz bandwidth for 0.5-pF photodiode capacitance, 6.7-pA/sqrt(Hz) noise current spectral density, and 33.8-mW power dissipation from a single 1.8-V supply. The measured eye-diagrams of the array confirm wide and clear eye-openings up to 1.3-Gb/s operations. Also, the optical pulse measurements estimate that the proposed 16-channel TIA array chip can detect signals within 20 meters away from the laser source. The whole chip occupies the area of $5.0{\times}1.1mm^2$ including I/O pads. For comparison, a current-mode 16-channel TIA array is also realized in the same $0.18-{\mu}m$ CMOS technology, which exploits regulated-cascode (RGC) input configuration. Measurements reveal that the I-TIA array achieves superior performance in optical pulse measurements.

• 대한전자공학회논문지TC
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• 제48권11호
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• pp.28-34
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• 2011

최근 들어 CDMA 기반 시스템에서 고속 데이터 서비스 지원을 위한 수신 성능 개선 방법의 하나로 chip-level equalization 기법에 대한 연구가 활발히 진행되고 있다. 이와 관련된 연구의 하나로 본 논문에서는 D-TxAA (dual stream transmit antenna array) 방식을 사용하는 HSDPA MIMO 시스템에 적용 가능한 Griffiths algorithm 기반 chip-level 적응 LMMSE equalizer의 구조를 제안하고자 한다. 먼저 Griffiths 알고리즘을 D-TxAA 방식에 적용할 경우 사용 가능한 두 가지 형태의 적응 LMMSE equalizer 구조를 유도할 것이며, 여러 채널 환경에 대한 컴퓨터 모의실험을 통해 두 수신기의 성능을 비교 분석하고자 한다.

• 한국전기전자재료학회논문지
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• 제17권4호
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• pp.410-414
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• 2004

High throughput analysis using a DNA chip microarray is powerful tool in the post genome era. Less labor-intensive and lower cost-performance is required. Thus, this paper aims to develop the multi-channel type label-free DNA chip and detect SNP (Single nucleotide polymorphisms). At first, we fabricated a high integrated type DNA chip array by lithography technology. Various probe DNAs were immobilized on the microelectrode array. We succeeded to discriminate of DNA hybridization between target DNA and mismatched DNA on microarray after immobilization of a various probe DNA and hybridization of label-free target DNA on the electrodes simultaneously. This method is based on redox of an electrochemical ligand.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.402-403
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• 2006

This research aims to develop the multiple channel electrochemical DNA chip using microfabrication technology. At first, we fabricated a high integration type DNA chip array by lithography technology. Several probe DNAs consisting of thiol group at their 5-end were immobilized on the gold electrodes. Then target DNAs were hybridized and reacted. Cyclic voltammetry showed a difference between target DNA and control DNA in the anodic peak current values. Therefore, it is able to detect a plural genes electrochemically after immobilization of a plural probe DNA and hybridization of non-labeling target DNA on the electrodes simultaneously. It suggested that this DNA chip could recognize the sequence specific genes.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.410-411
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• 2006

High throughput analysis using a DNA chip microarray is powerful tool in the post genome era. Less labor-intensive and lower cost-performance is required. Thus, this paper aims to develop the multi-channel type label-free DNA chip and detect SNP (Single nucleotide polymorphisms). At first, we fabricated a high integrated type DNA chip array by lithography technology. Various probe DNAs were immobilized on the microelectrode array. We succeeded to discriminate of DNA hybridization between target DNA and mismatched DNA on microarray after immobilization of a various probe DNA and hybridization of label-free target DNA on. the electrodes simultaneously. This method is based on redox of an electrochemical ligand.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2007년도 추계학술대회 논문집
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• pp.100-103
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• 2007

A microlens array has been required to improve light conversion efficiency in image sensors. A microlens array can be usually fabricated by photoresist reflow, hot-embossing, micro injection molding, and UV-imprinting. Among these processes, a UV-imprinting, which is operated at room temperature with relatively low applied pressure, can be a desirable process to integrate microlens array on image sensors, because this process provides the components with low thermal expansion, enhanced stability, and low birefringence, furthermore, it is more suitable for mass production of high quality microlens array. In this study, to analyze the optical properties of the wafer scale microlens array integrated image sensor, another wafer scale simulated image sensor chip array was designed and fabricated. An aspherical square microlens was designed and integrated on a simulated image sensor chip array using a UV-imprinting process. Finally, the optical performances were measured and analyzed.

• 대한전자공학회논문지
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• 제25권9호
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• pp.1115-1124
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• 1988

A two-dimensional systolic array for fast Fourier transform, which has a regular and recursive VLSI architecture is presented. The array is constructed with identical processing elements (PE) in mesh type, and due to its modularity, it can be expanded to an arbitrary size. A processing element consists of two data routing units, a butterfly arithmetic unit and a simple control unit. The array computes FFT through three procedures` I/O pipelining, data shuffling and butterfly arithmetic. By utilizing parallelism, pipelining and local communication geometry during data movement, the two-dimensional systolic array eliminates global and irregular commutation problems, which have been a limiting factor in VLSI implementation of FFT processor. The systolic array executes a half butterfly arithmetic based on a distributed arithmetic that can carry out multiplication with only adders. Also, the systolic array provides 100% PE activity, i.e., none of the PEs are idle at any time. A chip for half butterfly arithmetic, which consists of two BLC adders and registers, has been fabricated using a 3-um single metal P-well CMOS technology. With the half butterfly arithmetic execution time of about 500 ns which has been obtained b critical path delay simulation, totla FFT execution time for 1024 points is estimated about 16.6 us at clock frequency of 20MHz. A one-PE chip expnsible to anly size of array is being fabricated using a 2-um, double metal, P-well CMOS process. The chip was layouted using standard cell library and macrocell of BLC adder with the aid of auto-routing software. It consists of around 6000 transistors and 68 I/O pads on 3.4x2.8mm\ulcornerarea. A built-i self-testing circuit, BILBO (Built-In Logic Block Observation), was employed at the expense of 3% hardware overhead.

• ETRI Journal
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• 제35권3호
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• pp.378-385
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• 2013

An S-band multifunction chip with a simple interface for an active phased array base station antenna for next-generation mobile communications is designed and fabricated using commercial 0.5-${\mu}m$ GaAs pHEMT technology. To reduce the cost of the module assembly and to reduce the number of chip interfaces for a compact transmit/receive module, a digital serial-to-parallel converter and an active bias circuit are integrated into the designed chip. The chip can be controlled and driven using only five interfaces. With 6-bit phase shifting and 6-bit attenuation, it provides a wideband performance employing a shunt-feedback technique for amplifiers. With a compact size of 16 $mm^2$ ($4mm{\times}4mm$), the proposed chip exhibits a gain of 26 dB, a P1dB of 12 dBm, and a noise figure of 3.5 dB over a wide frequency range of 1.8 GHz to 3.2 GHz.