• ETRI Journal
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• 제42권3호
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• pp.376-387
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• 2020

Massive computation of the reconstruction algorithm for compressive sensing (CS) has been a major concern for its real-time application. In this paper, we propose a novel high-speed architecture for the orthogonal matching pursuit (OMP) algorithm, which is the most frequently used to reconstruct compressively sensed signals. The proposed design offers a very high throughput and includes an innovative pipeline architecture and scheduling algorithm. Least-squares problem solving, which requires a huge amount of computations in the OMP, is implemented by using systolic arrays with four new processing elements. In addition, a distributed-arithmetic-based circuit for matrix multiplication is proposed to counterbalance the area overhead caused by the multi-stage pipelining. The results of logic synthesis show that the proposed design reconstructs signals nearly 19 times faster while occupying an only 1.06 times larger area than the existing designs for N = 256, M = 64, and m = 16, where N is the number of the original samples, M is the length of the measurement vector, and m is the sparsity level of the signal.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제7권8호
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• pp.1805-1824
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• 2013

Recently, the use of wireless body area networks (WBAN) has been increasing rapidly in medical healthcare applications. WBANs consist of smart nodes that can be used to sense and transmit vital data such as heart rate, temperature and ECG from a human body to a medical centre. WBANs depend on limited resources such as energy and bandwidth. In order to utilise these resources efficiently, a very well organized medium access control (MAC) protocol must be considered. In this paper, a new, adaptive and energy-efficient MAC protocol, entitled isMAC, is proposed for WBANs. The proposed MAC is based on multi-channel communication and aims to prolong the network lifetime by effectively employing (i) a collision prevention mechanism, (ii) a coordinator node (WCN) selection algorithm and (iii) a transmission power adjustment approach. The isMAC protocol has been developed and modelled, by using OPNET Modeler simulation software. It is based on a networking scenario that requires especially high data rates such as ECG, for performance evaluation purposes. Packet delay, network throughput and energy consumption have been chosen as performance metrics. The comparison between the simulation results of isMAC and classical IEEE 802.15.4 (ZigBee) protocol shows that isMAC significantly outperforms IEEE 802.15.4 in terms of packet delay, throughput and energy consumption.

• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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• 제13권4호
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• pp.231-239
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• 2007

본 논문에서는 국내 표준 128비트 블록 암호화 알고리즘인 SEED를 하드웨어로 설계할 경우 면적-성능간의 trade-off 관계를 보여준다. 본 논문에서 다음 4가지 유형의 설계 구조를 비교한다. (1) Design 1 : 16 라운드 완전 파이프라인 방식, (2) Design 2 : 단일 라운드의 반복 사용 방식 (3) Design 3 : G 함수 공유 및 반복 사용 방식 (4) Design 4 : 단일 라운드 내부 파이프라인 방식. (1),(2),(3)의 방식은 기존의 논문들에서 제안한 각기 다른 설계 방식이며 (4)번 설계 방식이 본 논문에서 새롭게 제안한 설계 방식이다. 본 논문에서 새롭게 제안한 방식은, F 함수 내의 G 함수들을 파이프라인 방식으로 연결하여 면적 요구량을 (2)번에 비해서 늘이지 않으면서도 파이프라인과 공유블록 사용의 효과로 성능을 Design 2와 Design 3보다 높인 설계 방식이다. 본 논문에서 4가지 각기 다른 방식을 각각 실제 하드웨어로 설계하고 FPGA로 구현하여 성능 및 면적 요구량을 비교 분석한다. 실험 분석 결과, 본 논문에서 새로 제안한 F 함수 내부 3단 파이프라인 방식이 Design 1 방식을 제외하고 가장 throughput 이 높다. 제안된 Design 4 가 단위 면적당 출력성능(throughput)면에서 다른 모든 설계 방식에 비해서 최대 2.8배 우수하다. 따라서, 새로이 제안된 SEED 설계가 기존의 설계 방식들에 비해서 면적대비 성능이 가장 효율적이라고 할 수 있다.

• 한국콘텐츠학회논문지
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• 제9권7호
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• pp.67-75
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• 2009

최근 무선 인터넷 수요의 증가와 더불어 IEEE 802.11 WLAN의 표준화 작업도 활발히 진행 중이다. 고속처리량을 위한 IEEE 802.11n의 연구 동향은 크게 두 가지로 MAC 계층에서 패킷 간의 Aggregation을 통하여 시스템 처리량을 높인 결과와PHY 계층에서 MIMO 시스템을 적용하여 데이터 전송속도를 높인 결과로 정리될 수 있다. 그러나 아직까지 MAC 계층과 PHY 계층의 연동을 고려하여 IEEE 802.11n의 성능 분석을 보인 결과는 발표되지 않았다. 본 논문에서는 IEEE 802.11n 시스템에서 MAC 계층과 PHY 계층의 연동을 고려하여 성능을 분석한다. MAC 계층에서의 A-MPDU 기법과 PGY 계층에서 MIMO 방식을 적용한다. 결과적으로 기존의 방식에 비해 데이터 전송속도의 증가와 처리량이 향상되었음을 보인다. 또한, MAC과 PRY의 연동을 고려하여 현실성 있는 시뮬레이터인 NS-2를 사용하기로 한다.

• 한국통신학회:학술대회논문집
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• 한국통신학회 1984년도 추계학술발표회논문집
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• pp.7-10
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• 1984

In this paper, the advantages of buffer insertion access method in comparison with other access methods to local area networks are analyzed. Sending and Receiving protocols in a data link layer are designed by a software method, We have derived both qeueing delays and the response time for the performance model that is proposed in this paper, and using the computer simulation, analyzed the performance for the proposed model in terms of the throughput rate- response time characteristrics. Based on the proposed model, the hardware design is implemented.

• ETRI Journal
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• 제35권3호
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• pp.448-458
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• 2013

This paper presents a generalized post-processing technique for enhancing the pseudorandomness of digital chaotic oscillators through a nonlinear XOR-based operation with rotation and feedback. The technique allows full utilization of the chaotic output as pseudorandom number generators and improves throughput without a significant area penalty. Digital design of a third-order chaotic system with maximum function nonlinearity is presented with verified chaotic dynamics. The proposed post-processing technique eliminates statistical degradation in all output bits, thus maximizing throughput compared to other processing techniques. Furthermore, the technique is applied to several fully digital chaotic oscillators with performance surpassing previously reported systems in the literature. The enhancement in the randomness is further examined in a simple image encryption application resulting in a better security performance. The system is verified through experiment on a Xilinx Virtex 4 FPGA with throughput up to 15.44 Gbit/s and logic utilization less than 0.84% for 32-bit implementations.

• Journal of Communications and Networks
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• 제17권1호
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• pp.84-92
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• 2015

Multi-hop relay networks have been widely considered as a promising solution to extend the coverage area and to reduce the deployment cost by deploying the relay stations (RSs) in mobile communication systems. Suitable deployment for the RSs is one of the most important features of the demand nodes (DNs) to obtain a high data transmission rate in such systems. Considering a tradeoff among the network throughput, the deployment budget, and the overall coverage of the systems, efficient RS deployment schemes and corresponding algorithms must be developed and designed. A novel cluster-based RS deployment scheme is proposed in this paper to select the appropriate deployment locations for the relay stations from the candidate positions. To make an ideal cluster distribution, the distances between the DNs are calculated when deploying the RSs. We take into account the traffic demands and adopt a uniform cluster concept to reduce the data transmission distances of the DNs. On the basis of the different candidate positions, the proposed scheme makes an adaptive decision for selecting the deployment sites of the RSs. A better network throughput and coverage ratio can be obtained by balancing the network load among the clusters. Simulation results show that the proposed scheme outperforms the previously known schemes in terms of the network throughput and the coverage ratio. Additionally, a suitable deployment budget can be implemented in multi-hop relay networks.

• 농업과학연구
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• 제45권3호
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• pp.317-323
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• 2018

The demand for crop production is increasingly becoming steeper due to the rapid population growth. As a result, breeding cycles should be faster than ever before. However, the current breeding methods cannot meet this requirement because traditional phenotyping methods lag far behind even though genotyping methods have been drastically developed with the advent of next-generation sequencing technology over a short period of time. Consequently, phenotyping has become a bottleneck in large-scale genomics-based plant breeding studies. Recently, however, phenomics, a new discipline involving the characterization of a full set of phenotypes in a given species, has emerged as an alternative technology to come up with exponentially increasing genomic data in plant breeding programs. There are many advantages for using new technologies in phenomics. Yet, the necessity of diverse man power and huge funding for cutting-edge equipment prevent many researchers who are interested in this area from adopting this new technique in their research programs. Currently, only a limited number of groups mostly in developed countries have initiated phenomic studies using high throughput methods. In this short article, we describe the strategies to compete with those advanced groups using limited resources in developing countries, followed by a brief introduction of high throughput phenotyping.

• 한국군사과학기술학회지
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• 제14권5호
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• pp.880-887
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• 2011

The Wireless Mesh Network(WMN) technology is able to provide an infrastructure for isolated islands, in which it is difficult to install cables or wide area such as battlefield. Therefore, WMN is frequently used to satisfy needs for internet connection and active studies and research on them are in progress. However, as a result of increase in number of hops under hop-by-hop communication environment has caused a significant decrease in throughput and an increase in delay. Considering the heavy traffic of real-time data, such as voice or moving pictures to adaptive WMN, in a military environment. Such phenomenon might cause an issue in fairness index. In order to resolve this issue, we proposed a Cluster Based Multi-channel Assignment Scheme(CB-MAS) for adaptive tactical wireless mesh network. In the CB-MAS, the communication between the Cluster-Head(CH) and cluster number nodes uses a channel has no effect on channels being used by the inter-CH links. Therefore, the CB-MAS can minimize the interference within multi-channel environments. Our Simulation results showed that CB-MAS achieves improved the throughput and fairness index in WMN.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2012년도 추계학술대회
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• pp.263-266
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• 2012

본 논문에서는 ISO/IEC 10118-3의 표준인 Whirlpool 해쉬 함수의 효율적인 하드웨어 설계와 FPGA 검증에 대해 기술한다. Pipelined small LUT를 이용하여 동작 타이밍을 최적화하였으며, Whirlpool 블록암호와 key schedule을 병렬로 사용하여 throughput을 개선하였다. 키 스케쥴에서 키 덧셈부분에 rom과 xor 게이트를 사용하지 않고 인버터와 mux로 구현하여 면적을 최적화하였다. Virtex5-XC5VSX50T를 사용하여 FPGA 검증을 하였고 최대 동작 주파수는 약 151MHz이며, 약 950Mbps의 성능을 가진다.