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http://dx.doi.org/10.4218/etrij.13.0112.0677

Generalized Hardware Post-processing Technique for Chaos-Based Pseudorandom Number Generators  

Barakat, Mohamed L. (Electrical Engineering Program, King Abdullah University of Science and Technology)
Mansingka, Abhinav S. (Electrical Engineering Program, King Abdullah University of Science and Technology)
Radwan, Ahmed G. (Department of Engineering Mathematics, Cairo University, Nanoelectronics Integrated Systems Center (NISC), Nile University)
Salama, Khaled N. (Electrical Engineering Program, King Abdullah University of Science and Technology)
Publication Information
ETRI Journal / v.35, no.3, 2013 , pp. 448-458 More about this Journal
Abstract
This paper presents a generalized post-processing technique for enhancing the pseudorandomness of digital chaotic oscillators through a nonlinear XOR-based operation with rotation and feedback. The technique allows full utilization of the chaotic output as pseudorandom number generators and improves throughput without a significant area penalty. Digital design of a third-order chaotic system with maximum function nonlinearity is presented with verified chaotic dynamics. The proposed post-processing technique eliminates statistical degradation in all output bits, thus maximizing throughput compared to other processing techniques. Furthermore, the technique is applied to several fully digital chaotic oscillators with performance surpassing previously reported systems in the literature. The enhancement in the randomness is further examined in a simple image encryption application resulting in a better security performance. The system is verified through experiment on a Xilinx Virtex 4 FPGA with throughput up to 15.44 Gbit/s and logic utilization less than 0.84% for 32-bit implementations.
Keywords
Chaos; pseudorandom number generator; post-processing; FPGA;
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Times Cited By KSCI : 3  (Citation Analysis)
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