• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.07a
• /
• pp.597-600
• /
• 2003

Bi-2223/Ag HTS wires have been fabricated by the PIT(powder in tube)process. Intermediate annealing was carried out to increase the homogenization and uniformity of the superconducting filaments embedded in the silver matrix during the deformation process that is important to sustain the engineering critical current density in long superconducting wire. Intermediate annealing act to release the deformation hardening of the superconducting wires during drawing process. Rolling parameters were investigated to roll the superconducting tapes with uniform thickness, width and winding tensions. Critical current of 60 m long superconducting tapes was measured 54.3 A continuously after final sintering heat treatment. The phase analysis of Bi-2223/Ag superconducting tapes are examined by the XRD.

• Journal of the Semiconductor & Display Technology
• /
• v.23 no.1
• /
• pp.88-91
• /
• 2024

The europium doped yttrium oxide (Y₂O₃:Eu³⁺) thin film was formed on a Si substrate by the conventional spin-coating process followed by rapid thermal annealing (RTA) treatment. The spinning profiles such as rotation speed, acceleration and holding times were controlled during the spin-coating process for the best condition of the Y₂O₃:Eu³⁺ thin film. The RTA treatment was conducted for several temperature in order to crystallize the spin coated film. The Y₂O₃:Eu³⁺ thin film presented best performance in the conditions of 4000 rpm, 30 s and 10 s of rotation speed, acceleration time and holding time, respectively, at a fixed RTA temperature of 900 ℃.

• Journal of the Microelectronics and Packaging Society
• /
• v.25 no.3
• /
• pp.61-66
• /
• 2018

This research scrutinizes the self-annealing characteristics of copper used to metal interconnection for application of DRAM fabrication process. As the time goes after the copper deposited, the grain of copper is growing. It is called self-annealing. We use the electroplating method for copper deposition and estimate two kinds of electroplating chemicals having different organic additives. As the time of self-annealing is elapsed, sheet resistance decreases with logarithmic dependence of time and is finally saturated. The improvement of sheet resistance is approximately 20%. The saturation time of experimental sample is shorter than that of reference sample. We can find that self-annealing is highly efficient in grain growth of copper through the measurement of TEM analysis. The structure of copper grain is similar to the bamboo type useful for current flow. The results of thermal excursion characteristics show that the reliability of self-annealed sample is better than that of sample annealed at higher temperature. The self-annealed sample is not contained in hillock. The self-annealed samples grow until $2{\mu}m$ and develop in [100] direction more favorable for reliability.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.29 no.4 s.235
• /
• pp.632-638
• /
• 2005

The surface lapping process on sapphire wafer was carried out for the epitaxial process of thin film growth of GaN semiconducting material. The planarization of the wafers was investigated by the introduction of the dummy wafers. The diamond lapping process causes the surface deformation of dislocation and micro-cracks. The material deformation due to the mechanical stress was analyzed by the X-ray diffraction and the Vickers indentation. The fracture toughness was increased with the increased annealing temperature indicating the recrystallization at the surface of the sapphire wafer The sudden increase at the temperature of $1200^{\circ}C$ was correlated with the surface phase transition of sapphire from a $-A1_{2}O_{3}\;to\;{\beta}-A1_{2}O_{3}$.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
• /
• 2001.04a
• /
• pp.281-286
• /
• 2001

Titanium alloy conducted in this experimental study has superior corrosive resistant and is mainly used in aerospace, automotive and petro-chemical industries. It is also treated with important materials of domestic goods due to improvement of the standard of living. In this study specimens were processed in the wire EDM after annealing, solution treatment and aging. Results were obtained through repeated experments of main rough process and finish process with the change of process parameters. Processing characteristics such as surface hardness, surfaces roughness, shape of processed surface and components were measured. The results confirmed that the above mentioned elements were improved in accordance with the number of process. Therefore, the optimal wire EDM condition in accord with processing characteristics is proposed in this experiment.

• Proceedings of the IEEK Conference
• /
• 2001.06b
• /
• pp.273-276
• /
• 2001

The origin of image-slicking in metal-insulator-metal type thin-film-diode(TFD) LCDs is the asymmetric current-voltage(I-V) characteristic of TFD element. we developed that MIM-LCDs have reduced-image-sticking and perfect symmetry characteristic. One-Time Post-Annealing (OPTA) heat treatment process was introduced to reduce the asymmetry and shift of the I-V characteristics, respectively. OPTA means that the whole layers of lower metal, insulator, and uuper metal are annealed at one time. The treatment temperatures and fabricated process of TFD element were under foot. Also, this low temperature fabricated process allows the application of plastic substrates.

• International Journal of Computer Science & Network Security
• /
• v.22 no.3
• /
• pp.285-291
• /
• 2022

WSN is the major component for information transfer in IoT environments. Source Location Privacy (SLP) has attracted attention in WSN environments. Effective SLP can avoid adversaries to backtrack and capture source nodes. This work presents a Two-Level Randomized Sector-based Routing (TLRSR) model to ensure SLP in wireless environments. Sector creation is the initial process, where the nodes in the network are grouped into defined sectors. The first level routing process identifies sector-based route to the destination node, which is performed by Ant Colony Optimization (ACO). The second level performs route extraction, which identifies the actual nodes for transmission. The route extraction is randomized and is performed using Simulated Annealing. This process is distributed between the nodes, hence ensures even charge depletion across the network. Randomized node selection process ensures SLP and also avoids depletion of certain specific nodes, resulting in increased network lifetime. Experiments and comparisons indicate faster route detection and optimal paths by the TLRSR model.

• Journal of the Semiconductor & Display Technology
• /
• v.20 no.3
• /
• pp.57-64
• /
• 2021

The domestic semiconductor industry can produce various products that will satisfy customer needs by diversifying assembly parts and increasing compatibility between them. It is necessary to improve the production line as a method to reduce the work-in-process inventory (WIP) in the assembly line, the idle time of the worker, and the idle time of the process. The improvement of the production line is to balance the capabilities of each process as a whole, and to determine the timing of product input or the order of the work process so that the time required between each process is balanced. The purpose of this study is to find the optimal WIP and buffer size through SA (Simulated Annealing) that minimizes lead time while matching the number of two parts in a parallel assembly line with bottleneck process. The WIP level and buffer size obtained by the SA algorithm were applied to the CONWIP and DBR systems, which are the existing production systems, and the simulation was performed by applying them to the new hybrid production system. Here, the Hybrid method is a combination of CONWIP and DBR methods, and it is a production system created by setting new rules. As a result of the Simulation, the result values were derived based on three criteria: lead time, production volume, and work-in-process inventory. Finally, the effect of the hybrid production method was verified through comparative analysis of the result values.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.1
• /
• pp.16-21
• /
• 2015

In this study, the effects of forming gas post metallization annealing (PMA) on recessed AlGaN/GaN-on-Si MOSHFET were investigated. The device employed an ICPCVD $SiO_2$ film as a gate oxide layer on which a Ni/Au gate was evaporated. The PMA process was carried out at $350^{\circ}C$ in forming gas ambient. It was found that the device instability was improved with significant reduction in interface trap density by forming gas PMA.

• Journal of Mechanical Science and Technology
• /
• v.18 no.9
• /
• pp.1512-1518
• /
• 2004

Rescaled Simulated Annealing (RSA) has been adapted to solve combinatorial optimization problems in which the available computational resources are limited. Simulated Annealing (SA) is one of the most popular combinatorial optimization algorithms because of its convenience of use and because of the good asymptotic results of convergence to optimal solutions. However, SA is too slow to converge in many problems. RSA was introduced by extending the Metropolis procedure in SA. The extension rescales the state's energy candidate for a transition before applying the Metropolis criterion. The rescaling process accelerates convergence to the optimal solutions by reducing transitions from high energy local minima. In this paper, structural optimization examples using RSA are provided. Truss structures of which design variables are discrete or continuous are optimized with stress and displacement constraints. The optimization results by RSA are compared with the results from classical SA. The comparison shows that the numbers of optimization iterations can be effectively reduced using RSA.