• Title/Summary/Keyword: Annealing $SiO_2$

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Fabrication and characterization of $WSi_2$ nanocrystals memory device with $SiO_2$ / $HfO_2$ / $Al_2O_3$ tunnel layer

  • Lee, Hyo-Jun;Lee, Dong-Uk;Kim, Eun-Kyu;Son, Jung-Woo;Cho, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.134-134
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    • 2011
  • High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

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A study on the properties of the Electrocondutive Ceramic $SiC-TiB_2$ Composites according to Annealing Temperature. (Annealing 온도 변화에 따른 $\beta-SiC-TiB_2$ 도전성 세라믹 복합체의 특성 연구)

  • Shin, Yong-Deok;Ju, Jing-Young;Choi, Kwang-Soo;Oh, Sang-Soo;Lee, Dong-Yoon
    • Proceedings of the KIEE Conference
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    • 2002.11a
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    • pp.106-108
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    • 2002
  • The composites were fabricated 61vol.% $\beta-SiC$ and 39vol.% $TiB_2$ powders with the liquid forming additives of l2wt% $Al_2O_3+Y_2O_3$ by pressureless annealing at $1700^{\circ}C,\;1750^{\circ}C,\;1800^{\circ}C$ for 4 hours respectively. The result of Phase analysis of composites by XRD revealed $\alpha-SiC$(6H), $TiB_2$, and YAG($Al_5Y_3O_{12}$) crystal phase. The relative density and the Young's modulus showed the highest value of 92.9701% and 92.884Gpa for composites by pressureless annealing temperature $1700^{\circ}C$ at room temperature.

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The Structural and electrical Properties of $BaTiO_3$ Thin Films Deposited on Si/MgO Substrates (Si/MgO 기판에 증착된 BaTiO$_3$ 박막의 구조 및 전기적 특성)

  • 홍경진;김태성
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.12
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    • pp.1108-1114
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    • 1998
  • $BaTiO_3$ thin films preferred c-axis orientation for the potential application of ferroelectric memory devices were deposited on silicon substrates(100) by RF sputtering and annealed at 800 and 900[$^{\circ}C$] in air. The BT(100)/BT(110) peak ratio of the sputtered sample was decreased with post-annealing in air. According to increasing with annealing temperature and time, the peak ratio of BT(100)/BT(110) was decreased and the surface density of thin film was high. Dielectric characteristics of $BaTiO_3$ thin film was measured as a function of annealing temperature and frequency. The dielectric constants were increased with annealing and decreased with frequency by space charge polarization and dipole polarization below 600[kHz]. The remanent polarization and coercive field in P-E hysteresis loop of $BaTiO_3$thin film were increased with the annealing temperature in air. The remanent polarization and coercive filed annealed at 800[$^{\circ}C$] for 1hr were 1.2[$\mu$C/$cm^2$] and 200[kV/cm]

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Influence of post-annealing on DC degradation characteristics in $ZnO-Bi_2O_3$ Varistor ($ZnO-Bi_2O_3$ 계 바리스터에서 후열처리가 DC 열화 특성에 미치는 영향)

  • 소순진;김영진;소병문;박춘배
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.05a
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    • pp.333-336
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    • 1999
  • The relationship between the DC degradation characteristics of the $ZnO-Bi_2O_3$ varistor and post-annealing is investigated in this study. $ZnO-Bi_2O_3$ varistors containing $SiO_2$ range 0.3 mol% were fabricated by standard ceramic techniques. The post- annealing is performed at $550^{\circ}C$ for 0, 1.5 and 5h. A little phase transition is found according to the analysis of X-ray diffraction. DC degradation tests were conducted at $115\pm3^{\circ}C$ for periods up to 22h. Current-voltage analysis was used to determine nonlinear coefficients($\alpha$). Capacitance-voltage analysis enable the donor density($N_d$) and the barrier height($E_B$) to be determined. From above analysis, it is found that the past-annealing for 5h improved degradation characteristics in $ZnO-Bi_2O_3$ with Si additive.

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Electric Properties of SBT Thin Films with various Annealing Conditions (다양한 열처리 조건에 따른 SBT 박막의 전기적 특성)

  • Cho, C.N.;Kim, J.S.;Oh, Y.C.;Shin, C.G.;Park, G.H.;Choi, W.S.;Kim, C.H.;Hong, J.U.;Lee, J.U.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.589-592
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    • 2002
  • The $Sr_{0.7}Bi_{2.3}Ta_2O_9$(SBT) thin films are deposited on Pt-coated electrode(Pt/TiO2/SiO2/Si) using RF magnetron sputtering method. The structural and electric properties of SBT capacitors were influenced with annealing atmosphere. In the XRD pattern, the SBT thin films in all annealing atmosphere had (105) orientation. In the SEM images, Bi-layered perovskite phase was crystallized in all annealing atmosphere and grains largely grew in oxygen annealing atmosphere. The maximum remanent polarization and the coercive electric field in oxygen annealing atmosphere are $12.40{\mu}C/cm^2$ and 48kV/cm respectively. The dielectric constant and leakage current density annealing in oxygen atmosphere are 340 and $6.81{\times}10^{-10}A/cm^2$ respectively. The fatigue characteristics of SBT capacitors did not change up to $10^{10}$ switching cycles.

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Effect of Annealing Temperature on the Properties of $\beta$ -SiC-Ti $B_2$ Electrocondutive Ceramic Composites by Spray Dry (Spray Dry한 $\beta$-SiC-Ti $B_2$ 도전성 세라믹 복합체의 특성에 미치는 Annealing 온도)

  • 신용덕;주진영;최광수;오상수;서재호
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.52 no.8
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    • pp.335-341
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    • 2003
  • The composites were fabricated respectively 61vo1.% $\beta$ -SiC and 39vo1.% Ti $B_2$ spray-dried powders with the liquid forming additives of l2wt% $Al_2$ $O_3$$Y_2$ $O_3$ by pressureless annealing at 1$700^{\circ}C$, 175$0^{\circ}C$, 180$0^{\circ}C$ for 4 hours. The result of phase analysis of composites by XRD revealed $\alpha$ -SiC(6H), Ti $B_2$, and YAG(A $l_{5}$ $Y_3$ $O_{12}$ ) crystal phase. The relative density, the Young's modulus and fracture toughness showed respectively the highest value of 92.97%, 92.88Gpa and 4.4Mpaㆍ $m^{\frac{1}{2}}$ for composites by pressureless annealing temperature 1$700^{\circ}C$ at room temperature. The electrical resistivity showed the lowest value of 8.09${\times}$10$^{-3}$ ㆍcm for composite by pressureless annealing temperature 1$700^{\circ}C$ at $25^{\circ}C$. The electrical resistivity of the SiC-Ti $B_2$ composites was all positive temperature cofficient resistance(PTCR) in the temperature ranges from $25^{\circ}C$ to $700^{\circ}C$.

Hydrogen Degradation of Pt/SBT/Si, Pt/SBT/Pt Ferroelectric Gate Structures and Degradation Resistance of Ir Gate Electrode (Pt/SBT/Si, Pt/SBT/Pt 강유전체 게이트 구조에서 수소 열화 현상 및 Ir 게이트 전극에 의한 열화 방지 방법)

  • 박전웅;김익수;김성일;김용태;성만영
    • Journal of the Microelectronics and Packaging Society
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    • v.10 no.2
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    • pp.49-54
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    • 2003
  • We have investigated the effects of hydrogen annealing on the physical and electrical properties of $SrBi_{2}Ta_{2}O_9(SBT)$ thin films in the Pt/SBT/Si (MFS) structure and Pt/SBT/Pt (MFM) one, respectively. The microstructure and electrical characteristics of the SBT films were deteriorated after hydrogen annealing due to the damage of the SBT films during the annealing process. To investigate the reason of the degradation of the SBT films in this work, in particular, the effect of the Pt top electrodes, SBT thin films deposited on Si, Pt, respectively, were annealed with the same process conditions. From the XRD, XPS, P-V, and C-V data, it was seen that the SBT itself was degraded after $H_2$ annealing even without the Pt top electrodes. In addition, the degradation of the SBT films after $H_2$ annealing was accelerated by the catalytic reaction of the Pt top electrodes which is so-called hydrogen degradation. To prevent this phenomenon, we proposed the alternative top electrode material, i.e. Ir, and the electrical properties of the SBT thin films were examined in the $Ir/IrO_2/SBT/IrO_2$ structures before and after the H$_2$ annealing and recovery heat-treatment processes. From the results of the P-V measurement, it could be concluded that Ir is one of the promising candidate as the electrode material for degradation resistance in the MFM structure using SBT thin films.

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Characteristics of poly-Si TFTs using Excimer Laser Annealing Crystallization and high-k Gate Dielectrics (Excimer Laser Annealing 결정화 방법 및 고유전 게이트 절연막을 사용한 poly-Si TFT의 특성)

  • Lee, Woo-Hyun;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.1
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    • pp.1-4
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    • 2008
  • The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

Preparation and characterization of SrBi$_{2}$Ta$_{2}$ $O_{9}$ ferroelectric thin films for nonvolatile memory (비휘발성 메모리용 SrBi$_{2}$Ta$_{2}$ $O_{9}$강유전체 박막의 제조 및 특성연구)

  • 장호정;서광종;장기근
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.3
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    • pp.39-45
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    • 1998
  • SrBi$_{2}$Ta$_{2}$O$_{9}$ (SBT) ferroelectric thin films for nonvolatile memory were prepared on Pt/Ti/SiO$_{2}$/Si and RuO$_{2}$/SiO$_{2}$/Si substrates by RF magnetron sputtering. The dependences of crystalline and electrical properties on the lower electrode type(Pt and RuO$_{2}$) and the annealing temperatures were investigated. SBT films regardless of their electrode types showed typeical Bi layered peroviskite crystal structures. The crystalline quality of as-deposited SBT films was improved by the rapid thermal annealing at 650.deg. C for 30 sec. The remanetn polarization of 2Pr (Pr+-Pr-) of the annealed SBT films deposited on Pt/Ti/SiO$_{2}$/Si substrates were about 11 .mu.C/cm$^{2}$ and 3 .mu.C/cm$^{2}$, respectively. The leakage currents at 3 V bias voltage were about 0.8 .mu.A/cm$^{2}$ for SBT/ Pt/Ti/SiO$_{2}$/Si and about 1 .mu.A/cm$^{2}$ for SBT/RuO$_{2}$/SiO$_{2}$/Si sample. SBT films annealed at 650 .deg. C showed no degradation in Pr values after 10$^{11}$ polarization switching cycles, indicating good fatigue properties. In addition, for SBT samples deposited on Pt/Ti/SiO$_{2}$/Si, Pr values increased to more than that of initial state, suggesting the increament of leakage current caused by repeated polarization.

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Characteristics of SiO2/Si Quantum Dots Super Lattice Structure Prepared by Magnetron Co-Sputtering Method (마그네트론 코스퍼터링법으로 형성한 SiO2/Si 양자점 초격자 구조의 특성)

  • Park, Young-Bin;Kim, Shin-Ho;Ha, Rin;Lee, Hyun-Ju;Lee, Jung-Chul;Bae, Jong-Seong;Kim, Yang-Do
    • Korean Journal of Materials Research
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    • v.20 no.11
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    • pp.586-591
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    • 2010
  • Solar cells have been more intensely studied as part of the effort to find alternatives to fossil fuels as power sources. The progression of the first two generations of solar cells has seen a sacrifice of higher efficiency for more economic use of materials. The use of a single junction makes both these types of cells lose power in two major ways: by the non-absorption of incident light of energy below the band gap; and by the dissipation by heat loss of light energy in excess of the band gap. Therefore, multi junction solar cells have been proposed as a solution to this problem. However, the $1^{st}$ and $2^{nd}$ generation solar cells have efficiency limits because a photon makes just one electron-hole pair. Fabrication of all-silicon tandem cells using an Si quantum dot superlattice structure (QD SLS) is one possible suggestion. In this study, an $SiO_x$ matrix system was investigated and analyzed for potential use as an all-silicon multi-junction solar cell. Si quantum dots with a super lattice structure (Si QD SLS) were prepared by alternating deposition of Si rich oxide (SRO; $SiO_x$ (x = 0.8, 1.12)) and $SiO_2$ layers using RF magnetron co-sputtering and subsequent annealing at temperatures between 800 and $1,100^{\circ}C$ under nitrogen ambient. Annealing temperatures and times affected the formation of Si QDs in the SRO film. Fourier transform infrared spectroscopy (FTIR) spectra and x-ray photoelectron spectroscopy (XPS) revealed that nanocrystalline Si QDs started to precipitate after annealing at $1,100^{\circ}C$ for one hour. Transmission electron microscopy (TEM) images clearly showed SRO/$SiO_2$ SLS and Si QDs formation in each 4, 6, and 8 nm SRO layer after annealing at $1,100^{\circ}C$ for two hours. The systematic investigation of precipitation behavior of Si QDs in $SiO_2$ matrices is presented.