• Proceedings of the Optical Society of Korea Conference
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• 2004.02a
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• pp.296-297
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• 2004

A Signal processor for the open-loop fiber optic gyroscope(FOG) is equipped with a stabilizer to reduce the error due to drift of fiber phase modulator (FPM). The stabilizer is designed to be operated to maintain the ratio of amplitude and phase between harmonics in the FOG signal. When FPM stabilizer is used, the temperature drift of FOG is reduced to less than 0.5 deg/hr in change of 20$^{\circ}C$.

• Korean Journal of Optics and Photonics
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• v.12 no.3
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• pp.184-189
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• 2001

The design of an ultra fast ellipsometer is suggested. It adopts the division-of-amplitude-photopolarimeter (DOAP) as the polarization state detector. It does not utilize any moving part such as the rotating polarizer(analyzer) or even any electronic modulation part like the piezo-electric phase modulator. Hence the time resolution of the present system is limited only by the response time of the photo-detector and electronic circuit as well as the analog-digital converter. The feasibility of the suggested ultra fast ellipsometer was tested and the response time with nano-second time resolution has been verified. Its future application to the investigation of kinetics including that of the phase-change optical recording media like GezSb2 Tes is discussed. ussed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.12 s.103
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• pp.1239-1245
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• 2005

In this paper, a new predistortion linearizer using second harmonic components feedforwarding is proposed. The harmonic generator of the proposed predistorter that consists of a small signal amplifier extracts second harmonic signals. A vector modulator that modulate fundamental signal with second harmonic signals, generates the inverse third order intermodulation distortion signals and controls amplitude/phase of them with modulation factors. As a result, this linearizer is suppressed IMD3 signals of power amplifier effectively. The test results show that the third order IMD of power amplifier is suppressed more than 20 dB for CW two-tone signals. Also, it's improved the adjacent channel power ratio(ACPR) more than 5 dB for CDMA(IS-95) 4FA signals.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.7
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• pp.761-768
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• 2010

This paper presents an effective method to achieve the wideband waveform for high resolution SAR(Synthetic Aperture Radar) using the frequency multiplication technique. And also this paper analyzes the root causes for the spectral regrowth due to 3rd-order intermodulation in chirp bandwidth expansion scheme using quadrature modulator and frequency multipliers. The amplitude and phase imbalance requirement are defined based on the simulation results in terms of quadrature channel imbalance. This minimizes the degradation of range resolution, peak sidelobe ratio and integrated sidelobe ratio. The wideband chirp generator using the frequency multiplier and memory map scheme was manufactured and the compensation technique was presented to reduce the spectral regrowth of SAR waveform by minimizing the amplitude and phase imbalance. After I and Q channel imbalance adjustment, the carrier level reduces －28.7 dBm to －53.4 dBm. Chirp signal with 150 MHz bandwidth at S-band expands to 600 MHz bandwidth at X-band. The sidelobe levels are reduced by about 8 to 9 dB by compensating the amplitude balance between I and Q channels.

• Current Optics and Photonics
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• v.2 no.6
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• pp.576-581
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• 2018

A new approach for identification of a microwave frequency using an integrated optical waveguide chip, combined with a phase modulator (PM) and two microring resonators (MRRs), is proposed, theoretically deduced, and verified. By wavelength tuning to set the PM under the condition of a double side band (DSB), the measurement range can be started from the dc component, and the measurement range and response slope can be adjusted by designing the radius and transmission coefficient of the MRR. Simulations reveal that the amplitude comparison function (ACF) has a monotonic relationship from dc to 32.5 GHz, with a response slope of 5.15 dB under conditions of DSB modulation, when the radius values, transmission coefficients, and the loss factors are designed respectively as $R_1=400{\mu}m$, $R_2=600{\mu}m$, $t_1=t_2=0.63$, and ${\gamma}_1={\gamma}_2=0.66$. Theoretical calculations and simulation results both indicate that this new approach has the potential to be used for measuring microwave frequencies, with the advantages of compact structure and superior reconfigurability.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.569-572
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• 2014

This paper presents a CMOS switched-capacitor interface circuit for MEMS capacitive sensors. It consist of a capacitance to voltage converter(CVC), a second-order ${\Sigma}{\Delta}$ modulator, and a comparator. A bias circuit is also designed to supply constant bias voltages and currents. This circuit employes the correlated-double-sampling(CDS) and chopper-stabilization(CHS) techniques to reduce low-frequency noise and offset. The designed CVC has a sensitivity of 20.53mV/fF and linearity errors less than 0.036%. The duty cycle of the designed ${\Sigma}{\Delta}$ modulator output increases about 5% as the input voltage amplitude increases by 100mV. The designed interface circuit shows linearity errors less than 0.13%, and the current consumption is 0.73mA. The proposed circuit is designed in a 0.35um CMOS process with a supply voltage of 3.3V. The size of the designed chip including PADs is $1117um{\times}983um$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.1 s.104
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• pp.67-73
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• 2006

This paper proposes a new predistortion linearizer with controlling intermodulation distortion(IMD) signals. This linearizer achieves independent control of third- and fifth-order intermodulation distortion products using amplitude modulation with even harmonic signals. A vector modulator that modulate fundamental signal with both second- and fourth-order harmonic components generated by harmonic generator circuits, generates the inverse characteristics third-and fifth-order intermodulation signals of power amplifier and controls amplitude and phase of them with each other modulation factors. As a results, this linearizer is suppressed IMD signals of power amplifier effectively. The test results show that the third IMD is cancelled more than 25 dB and the fifth order IMD is cancelled about 18 dB for CW two-tone signals. Also, it's improved the adjacent channel power ratio(ACPR) more than 7 dB for IS-95 CDMA signals.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.2
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• pp.98-103
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• 2008

There are the frequency shift keying(FSK), phase shift keying(PSK) and amplitude shift keying(ASK) in the conventional digital communications method. In this paper, We proposed a new robust wavelet shift keying system using scaling and wavelet function in the digital communication. Wavelet Transform consist of a low frequency and high frequency coefficient. When the input signal is one, if it finds the impulse response, the signal is separated from the scaling and wavelet function. The binary data is encoded by modulator which assigned the scaling function to 1(one), and wavelet to zero(0). It was demonstrated by experiment that the proposed algorithm can be a robust noise.

• Transactions on Electrical and Electronic Materials
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• v.11 no.1
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• pp.20-23
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• 2010

The analog front end (AFE) of a radio frequency identification transponder using the ISO 14443 type A standard with a 100% amplitude shift keying (ASK) modulation is proposed in this paper and verified by circuit simulations and measurements. This AFE circuit, using a 13.56 MHz carrier frequency, consists of a rectifier, a modulator, a demodulator, a regulator, a power on reset, and a dynamically enabled digital phase locked loop (DPLL). The DPLL, with a charge pump enable circuit, was used to recover the clock of a 100% modulated ASK signal during the pause period. A high voltage lateral double diffused metal-oxide semiconductor transistor was used to protect the rectifier and the clock recovery circuit from high voltages. The proposed AFE was fabricated using the $0.18\;{\mu}m$ standard CMOS process, with an AFE core size of $350\;{\mu}m\;{\times}\;230\;{\mu}m$. The measurement results show that the DPLL, using a demodulator output signal, generates a constant 1.695 MHz clock during the pause period of the 100% ASK signal.

• Korean Journal of Optics and Photonics
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• v.13 no.5
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• pp.377-383
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• 2002

An all-digital closed-loop (ADCL) signal processor for an open-loop FOG was developed to replace the analog circuitry of a Digital Phase Tracking (DPT) signal processor with new digital circuitry. When the ADCL signal processor without a stabilizer for fiber phase modulator (FPM) was attached to the FOG, temperature drift of FOG was about 0.26$\mu$rad/$^{\circ}C$, which makes the FOG unusable in medium or higher-grade applications. This drift was due to variations of phase modulation amplitude and phase delay of the FPM. The stabilizer controls its phase modulation amplitude and phase delay by regulating the ratio of harmonics of the FOG output. Thus, the stabilizer reduces the drift of the FOG to negligible.