• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.107-108
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• 2008

The spectacular development of AMLCDs, been made possible by a-Si:H technology, still faces two major drawbacks due to the intrinsic structure of a-Si:H, namely a low mobility and most important a shift of the transfer characteristics of the TFTs when submitted to bias stress. This has lead to strong research in the crystallization of a-Si:H films by laser and furnace annealing to produce polycrystalline silicon TFTs. While these devices show improved mobility and stability, they suffer from uniformity over large areas and increased cost. In the last decade we have focused on microcrystalline silicon (${\mu}c$-Si:H) for bottom gate TFTs, which can hopefully meet all the requirements for mass production of large area AMOLED displays [1,2]. In this presentation we will focus on the transfer of a deposition process based on the use of $SiF_4$-Ar-$H_2$ mixtures from a small area research laboratory reactor into an industrial gen 1 AKT reactor. We will first discuss on the optimization of the process conditions leading to fully crystallized films without any amorphous incubation layer, suitable for bottom gate TFTS, as well as on the use of plasma diagnostics to increase the deposition rate up to 0.5 nm/s [3]. The use of silicon nanocrystals appears as an elegant way to circumvent the opposite requirements of a high deposition rate and a fully crystallized interface [4]. The optimized process conditions are transferred to large area substrates in an industrial environment, on which some process adjustment was required to reproduce the material properties achieved in the laboratory scale reactor. For optimized process conditions, the homogeneity of the optical and electronic properties of the ${\mu}c$-Si:H films deposited on $300{\times}400\;mm$ substrates was checked by a set of complementary techniques. Spectroscopic ellipsometry, Raman spectroscopy, dark conductivity, time resolved microwave conductivity and hydrogen evolution measurements allowed demonstrating an excellent homogeneity in the structure and transport properties of the films. On the basis of these results, optimized process conditions were applied to TFTs, for which both bottom gate and top gate structures were studied aiming to achieve characteristics suitable for driving AMOLED displays. Results on the homogeneity of the TFT characteristics over the large area substrates and stability will be presented, as well as their application as a backplane for an AMOLED display.

• Transactions on Electrical and Electronic Materials
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• 제18권1호
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• pp.55-57
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• 2017

Amorphous oxide thin film transistors (TFTs) were fabricated with 0.5 wt% silicon doped zinc tin oxide (a-0.5SZTO) thin film deposited by radio frequency (RF) magnetron sputtering. In order to investigate the effect of annealing treatment on the electrical properties of TFTs, a-0.5SZTO thin films were annealed at three different temperatures ($300^{\circ}C$, $500^{\circ}C$, and $700^{\circ}C$ for 2 hours in a air atmosphere. The structural and electrical properties of a-0.5SZTO TFTs were measured using X-ray diffraction and a semiconductor analyzer. As annealing temperature increased from $300^{\circ}C$ to $500^{\circ}C$, no peak was observed. This provided crystalline properties indicating that the amorphous phase was observed up to $500^{\circ}C$. The electrical properties of a-0.5SZTO TFTs, such as the field effect mobility (${\mu}_{FE}$) of $24.31cm^2/Vs$, on current ($I_{ON}$) of $2.38{\times}10^{-4}A$, and subthreshold swing (S.S) of 0.59 V/decade improved with the thermal annealing treatment. This improvement was mainly due to the increased carrier concentration and decreased structural defects by rearranged atoms. However, when a-0.5SZTO TFTs were annealed at $700^{\circ}C$, a crystalline peak was observed. As a result, electrical properties degraded. ${\mu}_{FE}$ was $0.06cm^2/Vs$, $I_{ON}$ was $5.27{\times}10^{-7}A$, and S.S was 2.09 V/decade. This degradation of electrical properties was mainly due to increased interfacial and bulk trap densities of forming grain boundaries caused by the annealing treatment.

• 전자공학회논문지D
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• 제36D권7호
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• pp.17-25
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• 1999

PECVD 법을 이용하여 Tungsten Nitride($WN_x$) 박막을 $WSi_3N_4$ 기판위에 형성하였다. $WN_x$ 박막은 기관온도, 가스의 유량, rf power 등의 공정변수를 변화시키면서 형성되었고, 서로 다른 질소원으로 $NH_3$와 $N_2$를 각각 사용하여 박막의 특성을 조사하였다. $WN_x$ 막 내의 질소함량은 $NH_3$와 $N_2$의 유량에 따라 0~45% 정도로 변화하였으며, $NH_3$를 사용하였을 때, 최고 160nm/min의 높은 성장률을 나타내었다. $WSi_3N_4$ 기판 위에서는 TiN이나 Si 위에서보다 높은 성장률을 나타내었다. $WN_x$ 박막의 순도를 AES로 측정해 본 결과 $NH_3$를 사용했을 때 고순도의 박막을 얻을 수 있었다. XRD 분석으로 순수한 다결정의 W가 비정질의 $WN_x$로 변화되는 것을 알 수 있었으며, 이것은 $WN_x$가 식각 공정시 미세 패턴 형성이 W보다 유리할 것이라는 것을 보여준다. TiN, NiCr, Al 등의 다양한 기판 위에 형성해 본 결과 Al 위에서 최대 $1.6 {\mu}m$의 두꺼운 막이 형성되었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2000년도 제18회 학술발표회 논문개요집
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• 한국재료학회지
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• 제7권10호
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• pp.908-913
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• 1997

플라즈마 화학 증착 방법에 의해 corning 7059 유리기판위에 비정질 실리콘 박막을 만들고 고온열처리, 다단계급속열처리, 일차원 선형빔(line shape beam)의 가우스 분포를 가지는 엑시머 레이저 열처리를 이용하여 고상 및 액상의 재결정화를 통해 다결정 실리콘 박막을 제작하였다. 편광된 라만 분광학(Raman spectroscopy)을 통하여 여러 가지 열처리 방법과 기판온도에 따른 다결정 실리콘 박막의 잔류응력을 조사하였다. 레이저 열처리에 의하여 결정화된 실리콘 기판의 경우, 높은 결정화된 체적량과 잔류응력을 갖으며 equaxial결정성을 갖는다. 그러나 이러한 고상 재결정화된 다결정 실리콘 박막은 라만스펙트럼에서 480$cm^{-1}$ /주위에 넓게 퍼져있어 비정질상(amorphous phase)이 함께 존재함을 알 수 있다. 고온열처리와 다단계급속열처리의 경우 잔류응력의 크기는 각각 4.07x$10^{9.}$과 4.56x$10^{9 dyne}$ $\textrm{cm}^2$이다. 또한 엑시머레이저 열처리의 경우 기판온도가 상온에서 40$0^{\circ}C$로 증가할수록 열적인 완화에 의해 잔류응력이 1.35x$10^{10}$에서 8.58x$10^{9}$dyne/$\textrm{cm}^2$으로 감소하는 것을 알 수 있다.다.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2003년도 춘계학술발표강연 및 논문개요집
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• pp.41-41
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• 2003

비정질 실리콘 박막은 단결정 실리콘에 비해 저가이고 저온형성이 가능하여, 대면적/고효율의 실리콘 박막 태양전지 제작에 응용되고 있다. 태양전지에 적용하기 위해서는 우수한 암전류 및 광전류 특성을 나타내야 하고, 광학적 밴드 갭 특성 또한 중요하다. 본 연구에서는 HDP(High Density Plasma) PECVD 장비를 이용하여 나노결정립 및 비정질 실리콘 박막을 형성하고, 각 박막의 전기적, 광학적 특성을 측정, 평가하였다. 나노결정립 및 비정질 실리콘 박막의 전기적 특성은 Keithley 4200을 이용하여 암전류를 특성을 측정하였고, Solar Simulator를 이용하여 AM1.5, 100mW/$\textrm{cm}^2$ 조건에서 광전류 특성을 측정하였다. 또한, Spectrometer를 이용하여 박막의 투과율을 측정하여 Tauc Plot을 통해 광학적 밴드 갭을 계산하였다. 본 연구에서 형성된 비정질 실리콘 박막은 -$10^{6}$의 우수한 Photoresponse($\sigma$$_{ph}$ $\sigma$$_{d}$) 특성을 나타내었다. 또한, 비정질 실리콘 박막 내에 나노결정립이 형성됨에 따라 암전류는 증가하고, 광학적 밴드 갭도 증가하는 것을 알 수 있었다. 이렇게 밴드 갭이 증가된 나노결정립 실리콘 박막은 태양전지의 Window 층에 적용하면 효율 증가에 크게 기여할 것으로 판단된다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 하계종합학술대회 논문집
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• pp.390-393
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• 1989

Diamond is synthesized from the gaseous mixture of carbon monoxide and hydrogen by microwave PECVD. $10{\times}10mm^2$ silicon wafers are used as the substrate,and it can be raised more than $900^{\circ}C$ by microwave absorption, radiation by plasma and bombardment of ions. The changes of the morphology and the growth rates of the deposits with the experimental conditions are examined by Scanning Electron Microscopy. The d values of all the deposited films concide with those of powder diffraction data in XRD. In Raman spectra, the peak of the deposit coincides with that of the natural diamond which has a value of 1332.5 $cm^{-1}$, and the broad peak from 1360 $cm^{-1}$to 1600 $cm^{-1}$which represents the amorphous graphite was observed in the higher concentration of carbon monoxide.

• Transactions on Electrical and Electronic Materials
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• 제12권3호
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• pp.89-92
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• 2011

Hydrogenated amorphous carbon (a-C:H) films were deposited by plasma enhanced chemical vapor deposition on silicon substrates. a-C:H thin film was irradiated to a typical He-Cd laser to study its emitting properties. The photoluminescence (PL) intensity during the irradiation achieved a maximum value when 2,000 seconds elapsed. Fourier transform infrared measurement revealed a-C:H thin film suffered transformation from a polymer-like to graphite-like phase during laser irradiation. Thermal annealing was done at various temperatures, ranging from room temperature to $400^{\circ}C$ in the atmosphere, to investigate structural changes in a-C:H film by heat generation during the emission. PL intensity of a-C:H thin film increased 1.5 times without apparent structural change, as annealing temperature increased up to $200^{\circ}C$. However, a-C:H film above $200^{\circ}C$ exhibited significant decrease of PL accompanying dehydrogenation. This led to a red shift of the PL peak.

• 한국재료학회지
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• 제6권9호
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• pp.900-904
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• 1996

비정질 실리콘의 표면에 Ni과 Pd를 형성하여 측면으로의 결정화 속도를 향상시켰다. Ni에 의해 비정질 실리콘이 측면으로 결정화될 때 그 성장 속도는 50$0^{\circ}C$에서 3w$\mu\textrm{m}$/hour였으며 이때의 활성화 에너지는 2.87eV로 나타났다. Pd의 경우는 Pd2Si의 형성에 의해 압축 응력이 유발되어 Pdrks의 간격이 좁을수록 측면으로의 결정화 속도가 증가하였다. Ni과 Pd을 각각 다른 부분에 증착시키고 결정화시키면 Ni에 의해 측면으로 결정화되는 속도가 Ni만으로 결정화시킬 때 보다 약 2배 이상의 측면결정화 속도를 보였다.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2006년도 춘계학술대회
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• pp.228-231
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• 2006

This paper briefly introduces silicon based thin film solar cells: amorphous (a-Si:H), microcrystalline ${\mu}c-Si:H$ single junction and $a-Si:H/{\mu}c-Si:H$ tandem solar cells. The major difference of a-Si:H and ${\mu}c-Si:H$ cells comes from electro-optical properties of intrinsic Si-films (active layer) that absorb incident photon and generate electron-hole pairs. The a-Si:H film has energy band-gap (Eg) of 1.7-1.8eV and solar cells incorporating this wide Eg a-Si:H material as active layer commonly give high voltage and low current, when illuminated, compared to ${\mu}c-Si:H$ solar cells that employ low Eg (1.1eV) material. This Eg difference of two materials make possible tandem configuration in order to effectively use incident photon energy. The $a-Si:H/{\mu}c-Si:H$ tandem solar cells, therefore, have a great potential for low cost photovoltaic device by its various advantages such as low material cost by thin-film structure on low cost substrate instead of expensive c-Si wafer and high conversion efficiency by tandem structure. In this paper, the structure, process and operation properties of Si-based thin-film solar cells are discussed.