• The Journal of Korean Academy of Prosthodontics
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• v.44 no.6
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• pp.740-750
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• 2006

Statement of problems. In an attempt to reduce screw loosening, dry lubricant coatings such as pure gold or tefron have been applied to the abutment screw. However, under repeated tightening and loosening procedures, low wear resistance and adhesion strength of coating material produced free particles on the surface of abutment screw and increased frictional resistance resulting in screw tightening problems. Purpose. The aim of this study was to compare friction coefficient, adhesion strength, vickers hardness and evaluate coating surface of titanium alloy specimens coated with TiN(titanium nitride), ZrN(zirconium nitride) and WC(tungsten carbide). Material and method. Titanium alloy(Ti-6Al-4V) discs of 12mm in diameter and 1mm in thickness divided into 4 groups. TiN, ZrN and WC was coated for the specimens of 3 groups respectively, and those of 1 group were not coated. Each group was made up of 4 specimens. In this study, sputtering method was used among the PVD(Physical Vapor Deposition) techniques available for TiN, ZrN and WC coatings. Friction coefficient, adhesion strength, vickers hardness and coating surface of 4 groups were measured. Results. 1. For all three coating conditions, friction coefficient was significantly decreased. Especially, ZrN coated surface showed the lowest value. $TiN(0.39{\pm}0.02)$, $ZrN(0.24{\pm}0.01)$, $WC(0.31{\pm}0.03)$. 2. TiN coating showed the highest adhesion strength, however ZrN coating had the lowest value. $TiN(25.3N{\pm}1.6)$, $ZrN(14.8N{\pm}0.6)$, $ WC(18.4N{\pm}0.7)$. 3. Vickers hardness of all three coatings was remarkably increased as compared with that of none coated specimen. TiN coating had the highest Vickers hardness, however WC coating showed the lowest value. $TiN(1865.2{\pm}33.8)$, $ZrN(1814.4{\pm}18.6)$, $WC(1008.5{\pm}35.9)$. 4. The ZrN or WC coated specimen showed a homogeneous and smooth surface, however the rough surface with defects was observed for TiN coating. Conclusions. When TiN, ZrN and WC coating applied to the abutment screw, frictional resistance would be reduced, as a result, the greater preload and prevention of the screw loosening could be expected.

• Journal of the Korean Vacuum Society
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• v.17 no.6
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• pp.518-522
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• 2008

The miniaturization of device size and multilevel interlayers have been developed by ULSI circuit devices. These submicron processes cause serious problems in conventional metallization due to the solubility of silicon and metal at the interface, such as an increasing contact resistance in the contact hole and interdiffusion between metal and silicon. Therefore it is necessary to implement a barrier layer between Si and metal. Thus, the size of multilevel interconnection of ULSI devices is critical metallization schemes, and it is necessary reduce the RC time delay for device speed performance. So it is tendency to study the Cu metallization for interconnect of semiconductor processes. However, at the submicron process the interaction between Si and Cu is so strong and detrimental to the electrical performance of Si even at temperatures below $200^{\circ}C$. Thus, we suggest the tungsten-carbon-nitrogen (W-C-N) thin film for Cu diffusion barrier characterized by nano scale indentation system. Nano-indentation system was proposed as an in-situ and nanometer-order local stress analysis technique.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.4
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• pp.7-11
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• 2006

In this paper, it is reported that film-bulk-acoustic resonator with high c-axis oriented AIN film on $Mo/SiO_2/Si(100)$ using metal-organic-chemical-vapor deposition was fabricated. The resonant frequency and anti-resonant frequency of the fabricated resonator were observed with 3.189[GHz] and 3.224[GHz], respectively. The quality factor and the effective electromechanical coupling coefficient(${k_{eff}}^2$) were measured with 24.7 and 2.65[%], respectively. The conditions of AIN deposition were substrate temperature of $950[^{\circ}C]$, pressure of 20Torr, and V-III ratio of 25000. A high c-axis oriented AIN film with $4{\times}10^{-5}[\Omega{cm}]$ resistivity of Mo bottom electrode and $4[^{\circ}]$ of AIN(0002) full-width at half-maximum(FWHM) on $Mo/SiO_2/Si(100)$ was grown successfully. The FWHM value of deposited AIN film is useful for the RF band pass filter specification for GHz-band wireless local area network.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.380-380
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• 2010

Currently, organic light-emitting diodes (OLEDs) have been proven of their readiness for commercialization in terms of lifetime and efficiency. In accordance with emerging new technologies, enhancement of light efficiency and extension of application fields are required. Particularly inverted structures, in which electron injection occurs at bottom and hole injection on top, show crucial advantages due to their easy integration with Si-based driving circuits for active matrix OLED as well as large open area for brighter illumination. In order to get better performance and process reliability, usually a proper buffer layer for carrier injection is needed. In inverted top emission OLED, the buffer layer should protect underlying organic materials against destructive particles during the electrode deposition, in addition to increasing their efficiency by reducing carrier injection barrier. For hole injection layers, there are several requirements for the buffer layer, such as high transparency, high work function, and reasonable electrical conductivity. As a buffer material, a few kinds of transition metal oxides for inverted OLED applications have been successfully utilized aiming at efficient hole injection properties. Among them, we chose 2 nm of $WO_3$ between NPB [N,N'-bis(1-naphthyl)-N,N'-diphenyl-1,1'-biphenyl-4,4'-diamine] and Au (or Al) films. The interfacial energy-level alignment and chemical reaction as a function of film coverage have been measured by using in-situ ultraviolet and X-ray photoelectron spectroscopy. It turned out that the $WO_3$ interlayer substantially reduces the hole injection barrier irrespective of the kind of electrode metals. It also avoids direct chemical interaction between NPB and metal atoms. This observation clearly validates the use of $WO_3$ interlayer as hole injection for inverted OLED applications.

• Journal of the Korean Vacuum Society
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• v.11 no.3
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• pp.183-188
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• 2002

In the present study AI$(CH_3)_3)$films were deposited by the ALD technique using trimethylaluminum(TMA) and ozone to improve the quality of the AI$(CH_3)_3)$ films, since the $OH^-$ radicals existing in the AI$(CH_3)_3)$ films deposited using TMA and $H_2O$ degrade the physical and the dielectric properties of the AI$(CH_3)_3)$ film. The XPS analysis results indicate that the $OH^-$ radical concentration in the AI$(CH_3)_3)$film deposited using $O_3$is lower than that using $H_2O$. The etch rate of the AI$(CH_3)_3)$film deposited using $O_3$is also lower than that using $H_2O$, suggesting that the chemical inertness of the former is better than the latter. The MIS capacitor fabricated with the TiN conductor and the $Al_2$O$_3$dielectrics formed using $O_3$offers lower leakage current, better insulating property and smaller flat band voltage shift $({\Delta}V_{FB})$.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.504-504
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• 2011

최근 디지털 프린팅 기술의 핵심기술로 떠오르고 있는 잉크젯 프린팅 기술은 최근 기존의 문서인쇄 뿐 아니라, 직물 인쇄, 태양전지 등의 다양한 반도체 소자 제조에 널리 활용되고 있으며, 점차 그 응용 분야를 넓혀가고 있다. 특히 thermal 방식의 잉크젯 피린팅 기술은 etching, thin film process, lithography등의 반도체 공정 기술을 이용하여 제작할 수 있기 때문에, 현재 잉크젯 프린팅 기술은 대부분 thermal 방식을 체택하고 있다. 이러한 thermal 잉크젯 프린팅 방법에서는 잉크를 토출시키기 위하여, 전기적 에너지를 열에너지로 전환하는 전자저항막층이 필수적으로 필요하게 되는데, 이러한 전자저항막층은 수백도가 넘는 고온 및 잉크와 접촉으로 인한 부식 및 산화 문제가 발생할 수 있는 열악한 환경에서 사용되므로, Ta, SiN과 같은 보호층을 필수적으로 필요로 한다. 그러나 최근 잉크젯 프린터의 고해상도 고속화, 대면적 인쇄성 등과 같은 다양한 요구 증가에 따라, 잉크젯 프린터의 저전력 구동이 이슈로 떠올라 열효율에 방해가 되는 보호층을 제거할 필요성이 제기되고 있다. 지금까지는 Poly-Si, $HfB_2$, TiN, TaAl, TaN _0.8 등의 물질들이 잉크젯 프린터용 전자저항막 물질로 연구되거나 실제로 사용되어져 왔으나, 이러한 물질들을 보호층을 제거하는 경우 쉽게 산화되거나, 부식되는 문제점을 가지고 있다. 따라서, 기존 전자저항막의 기능을 만족시키면서, 산화나 부식에 대한 강한 내성을 가져 보호층을 제거하더라도 안정적으로 구동이 가능한 하이브리드 기능성(히터 + 보호층)을 가지는 잉크젯 프린터용 전자저항막 물질의 개발이 시급한 실정이다. 본 연구에서는 자기조립특성을 가져 정밀제어가 가능한 원자층증착법(Atomic Layer Deposition)을 이용하여 원자/나노 단위의 미세 구조 컨트롤을 통해 내열 내산화 내부식성 저온도저항계수를 동시에 가지는 다기능성 전자저항막을 설계 및 개발하고자 하였다. 전자저항막 개발을 위하여 우수한 내부식 내산화성을 가지고 결정립 크기에 따른 온도저항계수 조절이 가능한 platinum group metal들과 전기 저항 및 내열성 향상을 위한 물질의 복합구조막을 원자증증착법으로 증착하였다. 또한, 전자저항막 증착시 미세구조와 공정 변수가 내부식성, 내산화성, 그리고 온도저항계수에 미치는 영향을 체계적으로 연구하여, proto-type의 inkjet printhead를 구현하였다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.5
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• pp.185-190
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• 2002

Capacitor material utilized in the downsizing passive devices and dynamic random access memory(DRAM) requires the physical and electrical properties at given area such as capacitor thickness reduction, relative dielectric constant increase, low leakage current and thermal stability. Common capacitor materials, $SiO_2$, $Si_3N_4$, $SiO_2$/$Si_3N_4$,TaN and et al., used until recently have reached their physical limits in their application to several hundred angstrom scale capacitor. $Ta_2O_{5}$ is known to be a good alternative to the existing materials for the capacitor application because of its high dielectric constant (25 ~35), low leakage current and high breakdown strength. Despite the numerous investigations of $Ta_2O_{5}$ material, there have little been established the clear understanding of the annealing effect on capacitance characteristic and conduction mechanism, design and fabrication for $Ta_2O_{5}$ film capacitor. This study presents the structure-property relationship of reactive-sputtered $Ta_2O_{5}$ MIM capacitor structure processed by annealing in a vacuum. X-ray diffraction patterns skewed the existence of amorphous phase in as-deposited condition and the formation of preferentially oriented-$Ta_2O_{5}$ in 670, $700^{\circ}C$ annealing. On 670, $700^{\circ}C$ annealing under the vacuum, the leakage current decrease and the enhanced temperature-capacitance characteristic stability. and the leakage current behavior is stable irrespective of applied electric field. The results states that keeping $Ta_2O_{5}$ annealed at vacuum gives rise to improvement of electrical characteristics in the capacitor by reducing oxygen-vacancy and the broken bond between Ta and O.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.103-107
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• 2023

To solve the reliability problem of organic devices that are often used outdoors, multifunctional gas barriers that block reactive gases such as moisture and oxygen and reflect harmful light such as ultraviolet rays are needed. In this study, ALD nanolaminate-based optically functional n-DBR was developed to overcome the poor gas permeability of polymer substrates and protect organic devices from harmful light. n-DBR not only achieved a WVTR of 8.76 × 10^-6 g·m^-2·day^-1, but also showed a visible light transmittance of 94.3% and an ultraviolet ray blocking ability of 2.67%. In particular, n-DBR based on a nanolaminate structure maintained its permeability characteristics even in a high temperature and high humidity environment despite being used as a layer of Al₂O₃. This functional barrier Structure can not only be used as a functional encapsulation barrier for the reliability of organic devices, but can also be used as a tinting film for vehicles.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.258-258
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• 2016

최근 디스플레이 산업의 발전에 따라 고성능 디스플레이가 요구되며, 디스플레이의 백플레인 (backplane) TFT (thin film transistor) 구동속도를 증가시키기 위한 연구가 활발히 진행되고 있다. 트랜지스터의 구동속도를 증가시키기 위해 높은 이동도는 중요한 요소 중 하나이다. 그러나, 기존 백플레인 TFT에 주로 사용된 amorphous silicon (a-Si)은 대면적화가 용이하며 가격이 저렴하지만, 이동도가 낮다는 (< $1cm2/V{\cdot}s$) 단점이 있다. 따라서 전기적 특성이 우수한 산화물 반도체가 기존의 a-Si의 대체 물질로써 각광받고 있다. 산화물 반도체는 비정질 상태임에도 불구하고 a-Si에 비해 이동도 (> $10cm2/V{\cdot}s$)가 높고, 가시광 영역에서 투명하며 저온에서 공정이 가능하다는 장점이 있다. 하지만, 차세대 디스플레이 백플레인에서는 더 높은 이동도 (> $30cm2/V{\cdot}s$)를 가지는 TFT가 요구된다. 따라서, 본 연구에서는 차세대 디스플레이에서 요구되는 높은 이동도를 갖는 TFT를 제작하기 위하여, amorphous In-Ga-Zn-O (a-IGZO) 채널하부에 화학적으로 안정하고 전도성이 뛰어난 SnO2 채널을 얇게 형성하여 TFT를 제작하였다. 표준 RCA 세정을 통하여 p-type Si 기판을 세정한 후, 열산화 공정을 거쳐서 두께 100 nm의 SiO2 게이트 절연막을 형성하였다. 본 연구에서 제안된 적층된 채널을 형성하기 위하여 5 nm 두계의 SnO2 층을 RF 스퍼터를 이용하여 증착하였으며, 순차적으로 a-IGZO 층을 65 nm의 두께로 증착하였다. 그 후, 소스/드레인 영역은 e-beam evaporator를 이용하여 Ti와 Al을 각각 5 nm와 120 nm의 두께로 증착하였다. 후속 열처리는 퍼니스로 N2 분위기에서 $600^{\circ}C$의 온도로 30 분 동안 실시하였다. 제작된 소자에 대하여 TFT의 전달 및 출력 특성을 비교한 결과, SnO2 층을 형성한 TFT에서 더 뛰어난 전달 및 출력 특성을 나타내었으며 이동도는 $8.7cm2/V{\cdot}s$에서 $70cm2/V{\cdot}s$로 크게 향상되는 것을 확인하였다. 결과적으로, 채널층 하부에 SnO2 층을 형성하는 방법은 추후 높은 이동도를 요구하는 디스플레이 백플레인 TFT 제작에 적용이 가능할 것으로 기대된다.