• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.1
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• pp.68-72
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• 2012

In this paper, highly linear power amplifier using bandpass filter based on metamaterial and Composite Right- / Left-Handed (CRLH) structure is proposed. The proposed bandpass filter consist of the series capacitor, series microstrip line and the parallel inductor, parallel microstrip line. The insertion loss is minimized at operation frequency and the $2^{nd}$ harmonic is suppressed by the bandpass filter using the CRLH structure. And we improved the Adjacent Channel Leakage Ratio (ACLR) using the characteristic of the proposed bandpass filter. At 2.14 GHz, we have obtained the output power of 38.83 dBm, the $2^{nd}$ harmonic of .61.33 dBc, the $3^{rd}$ IMD of .54.67 dBc, and ACLR of .51.33 dBc at 5 MHz offset, -56.50 dBc at 10 MHz offset, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.1
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• pp.50-59
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• 2016

This work shows that the design and test results of a power amplifier(PA) with broadband and high linearity for 4G applications in $0.11{\mu}m$ CMOS process. A 1:2-transformer is designed for load impedance matching of PA and a inter-stage matching is implemented for a linearity. A designed PA achieves more than 27.3 dBm of linear output power and 26.1 % of power-added efficiency(PAE) under an adjacent channel leakage ratio(ACLR) of -30 dBc for a LTE 16-QAM 10 MHz signal with a carrier frequency range of 1.8 to 2.3 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.4
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• pp.430-439
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• 2011

In this paper, we design a digital predistortion(DPD) for linearity enhancement of RF power amplifier operating in 900 MHz band. We verify improvement of linearity by comparing the proposed DPD using tanh as a nonlinear indexing function and the DPD using linear indexing function based on signal amplitude. The digital predistortion is realized by look-up table(LUT) method, and the Saleh model is employed for power amplifier modeling, then a commercial power amplifier module is used for measurement. The LUT has 256 tables, and the NLMS(Normalized Least Mean Square) algorithm was utilized for an adaptive algorithm for estimation. As a result, we improve the ACLR(Adjacent Channel Leakage Ratio) by around 15 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.4
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• pp.484-490
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• 2012

In this paper, we design a digitally pre-distorted RF power amplifier operating in 900 MHz band. The linearity of RF power amplifier is improved by employing the digital pre-distortion(DPD) based on affine projection(AP) algorithm, where the look-up table(LUT) method is used with non-linear indexing. The proposed DPD with AP algorithm is compared with that with normalized least mean square(NLMS) algorithm, applied to the RF power amplifier. A commercial power amplifier module is used for verification of the proposed algorithm which shows improvement of adjacent channel leakage ratio(ACLR) by about 21 dB.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.393-398
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• 2014

A highly efficient dual-mode linear CMOS stacked-FET power amplifier (PA) is implemented for 3G UMTS and 4G LTE handset applications. High efficiency is achieved at a backed-off output power ($P_{out}$) below 12 dBm by employing an active-bypass amplifier, which consumes very low quiescent current and has high load-impedance. The output paths between high- and low-power modes of the PA are effectively isolated by using a bypass switch, thus no RF performance degradation occurs at high-power mode operation. The fabricated 900 MHz CMOS PA using a silicon-on-insulator (SOI) CMOS process operates with an idle current of 5.5 mA and shows power-added efficiency (PAE) of 20.5%/43.5% at $P_{out}$ = 12.4 / 28.2 dBm while maintaining an adjacent channel leakage ratio (ACLR) better than -39 dBc, using the 3GPP uplink W-CDMA signal. The PA also exhibits PAE of 35.1% and $ACLR_{E-UTRA}$ of -33 dBc at $P_{out}$ = 26.5 dBm, using the 20 MHz bandwidth 16-QAM LTE signal.

• Journal of Advanced Navigation Technology
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• v.27 no.2
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• pp.197-202
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• 2023

This paper presents the design method and electrical characteristics of a high-efficiency power amplifier for a 50 Watts class repeater applied to a 5G system and used in in-building, subway, and tunnel. GaN was used for the termination transistor of the power amplifier designed here, and intermodulation signals were removed using DPD to satisfy linearity. In addition, in order to handle various requirements such as amplifier gain control and alarm processing required in the 5G system, the microprocessor is designed to exist inside the power amplifier. The amplifier manufactured to confirm the electrical performance of the power amplifier satisfying these conditions satisfied 46.5 dBm and the overall efficiency of the amplifier was 37%, and it was confirmed that it satisfied various alarm conditions and electrical characteristics required by telecommunication companies.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.2
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• pp.104-110
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• 2019

In this paper, a complementary metal oxide semiconductor(CMOS) power amplifier(PA) integrated circuit operating in the 900 MHz band for long-term evolution(LTE) communication systems is presented. The output matching network based on a transformer was implemented on a printed circuit board for low loss. Simultaneously, to achieve high efficiency of the PA, the second harmonic impedances are controlled. The CMOS PA was fabricated using a $0.18{\mu}m$ CMOS process and measured using an LTE uplink signal with a bandwidth of 10 MHz and peak to average power ratio of 7.2 dB for verification. The implemented CMOS PA module exhibits a power gain of 24.4 dB, power-added efficiency of 34.2%, and an adjacent channel leakage ratio of -30.1 dBc at an average output power level of 24.3 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.8
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• pp.807-813
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• 2008

The gate-biases of the Doherty power amplifier are controlled to improve the linearity performance. The linearity improvement mechanism of the Doherty amplifier is the harmonic cancellation of the carrier and peaking amplifier at the output power combining point. However, it is difficult to cancel the harmonic power for the broader power range because the condition for cancelling is varied by power. For the linearity improvement, we have explored the linearity characteristic of the Doherty amplifier according to the input power and gate biases of the carrier and peaking amplifier. To extend the region of harmonic power cancellation, we have injected the proper gate bias to the carrier and peaking amplifier according to the input power levels. To validate the linearity improvement, the Doherty amplifier is designed using Eudyna 10-W PEP GaN HEMT EGN010MKs at 2.345 GHz and optimized to achieve a high linearity and efficiency at an average output power of 33 dBm, backed off about 10 dB from the $P_{1dB}$. In the experiments, the envelope tracking Doherty amplifier delivers a significantly improved adjacent channel leakage ratio performance of -37.4 dBc, which is an enhancement of about 2.8 dB, maintaining the high PAE of about 26 % for the WCDMA 1-FA signal at an average output power of 33 dBm. For the 802.16-2004 signal, the amplifier is also improved by about 2 dB, -35 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.10
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• pp.1096-1103
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• 2008

This paper proposes an individual order predistortion linearizer using intermodulation distortion(IMD) generator for cancellation the third and the fifth IMD of power amplifier. The IMD generator for controlling the third and the fifth IMD consist of common Emitter amplifier and Schottky diode. These signals are generated by series feedback of Schottky diode to obtain the inverse AM/AM and AM/PM characteristics of power amplifier. The individual order predistorters are consisted of individual IMD generator, power splitter and combiner. The test results show that the third and the fifth IMD can be improved by a maximum 13.5 dB and 0.9 dB in case of CW 2-tone signals. Also, the Adjacent Channel Leakage Ratio(ACLR) can be improved 2.3 dB, 2.5 dB at ${\pm}0.885$ MHz, ${\pm}1.23$ MHz offset frequency for CD-MA IS-95 2FA signals.

• Journal of electromagnetic engineering and science
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• v.11 no.1
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• pp.16-26
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• 2011

This paper presents high power and high efficiency Doherty amplifiers for 2.345 GHz wireless broadband (WiBro) applications that use a Nitronex 125-W ($P_{3dB}$) GaN high electron mobility transistor (HEMT). Two- and three-way Doherty amplifiers and a saturated Doherty amplifier using Class-F circuitry are implemented. The measured result for a center frequency of 2.345 GHz shows that the two-way Doherty amplifier attains a high $P_{3dB}$ of 51.5 dBm, a gain of 12.5 dB, and a power-added efficiency (PAE) improvement of about 16 % compared to a single class AB amplifier at 6-dB back-off power region from $P_{3dB}$. For a WiBro OFDMA signal, the Doherty amplifier provides an adjacent channel leakage ratio (ACLR) at 4.77 MHz offset that is -33 dBc at an output power of 42 dBm, which is a 9.5 dB back-off power region from $P_{3dB}$. By employing a digital pre-distortion (DPD) technique, the ACLR of the Doherty amplifier is improved from -33 dBc to -48 dBc. The measured result for the same frequency shows that the three-way Doherty amplifier, which has a $P_{3dB}$ of 53.16 dBm and a gain of 10.3 dB, and the saturated Doherty amplifier, which has a $P_{3dB}$ of 51.1 dBm and a gain of 10.3 dB, provide a PAE improvement of 11 % at the 9-dB back-off power region and 7.5 % at the 6-dB back-off region, respectively, compared to the two-way Doherty amplifier.