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http://dx.doi.org/10.5515/KJKIEES.2019.30.2.104

High-Efficiency CMOS Power Amplifier using Low-Loss PCB Balun with Second Harmonic Impedance Matching  

Kim, Hyungyu (School of Information and Communication Engineering, Sungkyunkwan University)
Lim, Wonseob (School of Information and Communication Engineering, Sungkyunkwan University)
Kang, Hyunuk (School of Information and Communication Engineering, Sungkyunkwan University)
Lee, Wooseok (School of Information and Communication Engineering, Sungkyunkwan University)
Oh, Sungjae (School of Information and Communication Engineering, Sungkyunkwan University)
Oh, Hansik (School of Information and Communication Engineering, Sungkyunkwan University)
Yang, Youngoo (School of Information and Communication Engineering, Sungkyunkwan University)
Publication Information
The Journal of Korean Institute of Electromagnetic Engineering and Science / v.30, no.2, 2019 , pp. 104-110 More about this Journal
Abstract
In this paper, a complementary metal oxide semiconductor(CMOS) power amplifier(PA) integrated circuit operating in the 900 MHz band for long-term evolution(LTE) communication systems is presented. The output matching network based on a transformer was implemented on a printed circuit board for low loss. Simultaneously, to achieve high efficiency of the PA, the second harmonic impedances are controlled. The CMOS PA was fabricated using a $0.18{\mu}m$ CMOS process and measured using an LTE uplink signal with a bandwidth of 10 MHz and peak to average power ratio of 7.2 dB for verification. The implemented CMOS PA module exhibits a power gain of 24.4 dB, power-added efficiency of 34.2%, and an adjacent channel leakage ratio of -30.1 dBc at an average output power level of 24.3 dBm.
Keywords
CMOS; Power Amplifier; Harmonic Impedance Control; LTE;
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