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http://dx.doi.org/10.5515/KJKIEES.2016.27.1.50

A Design of Power Amplifier with Broadband and High Linearity for 4G Application in 0.11 μm CMOS Process  

Kim, Ki-Hyun (INMC & Department of Electronical and Computer Engineering, Seoul National University)
Ko, Jae-Yong (INMC & Department of Electronical and Computer Engineering, Seoul National University)
Nam, Sang-Wook (INMC & Department of Electronical and Computer Engineering, Seoul National University)
Publication Information
Abstract
This work shows that the design and test results of a power amplifier(PA) with broadband and high linearity for 4G applications in $0.11{\mu}m$ CMOS process. A 1:2-transformer is designed for load impedance matching of PA and a inter-stage matching is implemented for a linearity. A designed PA achieves more than 27.3 dBm of linear output power and 26.1 % of power-added efficiency(PAE) under an adjacent channel leakage ratio(ACLR) of -30 dBc for a LTE 16-QAM 10 MHz signal with a carrier frequency range of 1.8 to 2.3 GHz.
Keywords
ACLR; Linearity; Power Amplifier; Transformer;
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