• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1491-1494
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• 2006

We report a method for reducing the address discharge delay. The address discharge delay was reduced when the MgO protective layer was made on the dielectric area which was made rough intentionally. The delay reduction was more pronounced in the formative delay.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.3
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• pp.34-39
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• 2004

This research investigated the influence on the 4 cell of DC discharge on the side of the discharge characteristic. This DC discharge cells are that composes AND gate of AND gate PDP newly proposed. As for the discharge starting voltage of this discharge cell of 4 pieces, it has been understood that there is deeply a relation up to the space charge generated from the discharge of adjoining discharge cell through the experiment. The discharge voltages which had become each discharge cell optimizations from the experiment result were decided. Moreover, the width of the margin of two AND input voltages is wide and the AND function occurs clearly. However, it has been qualitatively understood that it is difficult enough to obtain the operation margin of the DC priming discharge used to address discharge of PDP.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1258-1261
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• 2005

The ramp type bias voltage applied to the common electrode during a reset-period is newly proposed to lower the background luminance and to improve the address discharge characteristics in AC-PDP. The positive ramp bias voltage is applied during the ramp-up period, whereas the negative ramp bias voltage is applied during the ramp-down period. The effects of the voltage slopes in both the positive and negative ramp bias voltages on the background luminance and address voltage characteristics are examined intensively. It is observed that the optimized positive and negative ramp bias voltages applied to the common electrode during the ramp-period can lower the background luminance and also enhance the address discharge characteristics of the AC-PDP.

• Proceedings of the KIEE Conference
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• 2007.11a
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• pp.214-215
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• 2007

Unstable sustain discharges can occur at the bottom cells of the panel at high temperature. To solve this phenomenon, the wall charge variation during an address period was investigated. A test panel of 7.5 inch XGA level was used and one green cell was measured. In order to realize operating condition equal to that of the bottom cells of 50 inch panel, the addressing stress pulses are applied. It seems that the resultant wall charge loss during address period increased with increase of temperature as well as the addressing stress pulse voltage. Therefore it results in unstable discharge during sustain period.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.109-112
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• 2004

The effect of auxiliary electrode on the discharge characteristics in AC PDP with long sustain-gap was investigated. The auxiliary electrode was placed between scan and common electrode. When the pulse was applied to the auxiliary electrode during sustain period, the luminance of Ne + 13%Xe gas-mixture discharge increased and the discharge current decreased. The auxiliary pulse plays a role of improving electron excitation efficiency. When the auxiliary pulse was applied during address period, the address discharge time lag of Ne + 13%Xe gas-mixture could be reduced remarkably.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1636-1639
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• 2002

We proposed the new reset waveform for reducing reset period. The square pulse is applied to the address electrode when the ramp pulse increases before a discharge occurs between sustain electrodes. If the discharge occurs between address electrode and X electrode, the wall charge is reversely accumulated between sustain electrodes compared with the applying voltage before the discharge occurs between sustain electrodes. So the next discharge more weakly occurs between sustain electrodes. If the more weak discharge is obtained, it can make the low background luminance and the high contrast ratio and reduce ramp up time in the ramp reset waveform.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.5
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• pp.42-47
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• 2004

This research has improved the problem of discharge AND gate PDP proposed before. The polarity of the DC discharge which composes AND gate is reversely designed and the cross talk problem to the adjacent scanning electrode has been improved. The AND gate proposed before operated by using non-linearity of the discharge by the space charge. In this research, new discharge NOT logic in which it was used that an applied voltage changed with the discharge circuit was added to AND gate. AND gate came to operate more stably. A selective address was able to be discharged with four horizontal scanning electrodes from the experiment result. The operation margin of the AND gate discharge obtained 34V and of the address discharge obtained 70V.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1266-1268
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• 2005

The influence of the grooved dielectric layer on discharge and luminous characteristics has been investigated for various depths of the groove to achieve a high luminance efficiency AC-PDP operated at a lower voltage. We use the voltagethreshold curve technique and address delay jitters to explain the discharge characteristics. It shows that the surface discharge voltage rely on the depth of the grooved dielectric layer. Vertical discharge voltage remains almost the same as the groove depth increases. The influence of the grooved dielectric layer on discharge and luminous characteristics has been investigated for various depths of the groove to achieve a high luminance efficiency AC-PDP operated at a lower voltage. We use the voltagethreshold curve technique and address delay jitters to explain the discharge characteristics. It shows that the surface discharge voltage rely on the depth of the grooved dielectric layer. Vertical discharge voltage remains almost the same as the groove depth increases.

• Journal of Power Electronics
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• v.9 no.6
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• pp.884-891
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• 2009

An address voltage stabilization circuit for the single-side driving (SSD) method for AC plasma display panels (PDP) is proposed. The single-side driving method, which eliminates a common sustaining driver, uses only two electrodes in a three electrode AC PDP structure. The high-impedance (Hi-Z) mode operation of the data drive ICs during the sustaining period is needed for surface gas-discharge without misfiring in the SSD method but it produces the problem that the address voltage increases up to the breakdown voltage. The proposed circuit based on a flyback converter can stabilize the address voltage under the breakdown voltage and provide better surface gas-discharge performance without any misfiring in the SSD scheme.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.598-600
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• 2002

To improve the luminance and efficiency of AC PDP, the effects of a square pulse applied to the address electrode during a sustain-period is investigated. Through this experiment, we confirmed the improvement of luminance and efficiency. We performed the temporal behavior measurement for the light emitted from AC PDP at floating state of the address electrode and at various auxiliary voltages (including ground state) applied to the address electrode using the scanned point detecting system. In the case of using an auxiliary voltage pulse, emission starts at the inner edges of the anode and cathode simultaneously. Also, we obtained the larger two discharge volumes compared with the normal sustain discharge where address electrode is floated.