• Title/Summary/Keyword: Active Limiter

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Design and Fabrication of Ka-Band Active PIN Diode Limiter for a Millimeter Wave Seeker (밀리미터파 탐색기용 Ka 대역 능동 PIN 다이오드 리미터 설계 및 제작)

  • Yang, Seong-Sik;Lim, Ju-Hyun;Na, Young-Jin
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.2
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    • pp.220-228
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    • 2012
  • In this paper, we explained the design technique about Ka-band active limiter for protecting the receiver of a millimeter wave seeker. To implement low flat leakage power, we proposed the control circuit of active limiter to control limiter voltage with PRF(Pulse Repetition Frequency) signal and input power. This active limiter consisted of the conventional 2 stage passive limiter, a feedback circuit with a directional coupler, detector, non-inverting amplifier and over-current protection resistance. As the test result of the fabricated Ka-band limiter, it had 1 GHz bandwidth, 3.5 dB insertion loss at the small input power and -7.5 dBm flat leakage at the 4 W RF input power, respectively.

A Study on the Reliability of Superconducting Fault Current Limiter (초전도한류기의 신뢰도에 관한 연구)

  • Bae, In-Su;Kim, Sung-Yul;Kim, Jin-O
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.25 no.1
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    • pp.101-106
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    • 2011
  • The failure of cooling system in Superconducting Fault Current Limiter(SFCL) increases the impedance of superconducting device, and due to malfunction of inner switches the SFCL opens the distribution system inadvertently when required to do so. In this paper, the ground fault and short circuit fault were classified as active failure and the open circuit fault was passive failure. A reliability model of SFCL considers the passive failure as well as active failure, and in the case study the reliability indices of distribution system are evaluated. It is possible that the reliability evaluation excluded passive failure makes the customers reliability seem so worse than it really was. Therefore, the reliability models of SFCL must include the active failure and passive failure together to evaluate the reliability of distribution system connected SFCL.

Domestic Efforts for SFCL Application and Hybrid SFCL (국내 초전도 한류기 요구와 하이브리드 초전도 한류기)

  • Hyun, O.B.;Kim, H.R.;Yim, Y.S.;Sim, J.;Park, K.B.;Oh, I.S.
    • Progress in Superconductivity
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    • v.10 no.1
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    • pp.60-67
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    • 2008
  • We present domestic efforts for superconducting fault current limiter (SFCL) application in the Korea Electric Power Corporation (KEPCO) grid and pending points at issue. KEPCO's decision to upgrade the 154 kV/22.9 kV main transformer from 60 MVA to 100 MVA cast a problem of high fault current in the 22.9 kV distribution lines. The grid planners supported adopting an SFCL to control the fault current. This environment friendly to SFCL application must be highly dependent upon the successful development of SFCL having specifications that domestic utility required. The required conditions are (1) small size of not greater than twice of 22.9 kV gas insulated switch-gear (GIS), (2) sustainability of current limitation without the line breaking by circuit breakers (CB) for maximum 1.5 seconds. Also, optionally, recommended is (3) the reclosing capability. Conventional resistive SFCLs do not meet (1) $\sim$ (3) all together. A hybrid SFCL is an excellent solution to meet the conditions. The hybrid SFCL consists of HTS SFCL components for fault detection and line commutation, a fast switch (FS) to break the primary path, and a limiter. This characteristic structure not only enables excellent current limiting performances and the reclosing capability, but also allows drastic reduction of HTS volume and small size of the cryostat, resulting in economic feasibility and compactness of the equipment. External current limiter also enables long term limitation since it is far less sensitive to heat generation than HTS. Semi-active operation is another advantage of the hybrid structure. We will discuss more pending points at issues such as maintenance-free long term operation, small size to accommodate the in-house substation, passive and active control, back-up plans, diagnosis, and so on.

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The Analysis of the LCL Set-up Parameters for Satellite Power Distribution (위성전원분배를 위한 LCL 동작 파라미터 설정분석)

  • Lim, Seong-Bin;Jeon, Hyun-Jin;Kim, Kyung-Soo;Kim, Tae-Youn
    • Aerospace Engineering and Technology
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    • v.10 no.2
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    • pp.56-64
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    • 2011
  • In this paper, the characteristics of LCL set-up parameters for the satellite load distribution are analyzed under the electrical system environment, implemented the LCL circuits and evaluated the performance and its behaviour. Recently, it is implemented the load distribution circuit by latching current limiter(LCL) rather than conventional fuse and relay for the protection of the satellite power system from a fault load. The LCL circuit is composed of the electrical components, not mechanical parts with the fuse and relay. When detected the over current on a fault load, it is activated to maintain the trip-off level for set-up time and then cut-off the load power by the active control. It is more flexible and provided a chance to reuse of the load in case of temporarily event, but the fuse and relay can't be used again after activating due to the physical disconnection. However, for implementation of LCL circuit, it should be carefully considered the behavior of the LCL circuit under the worst electrical system environment and applied it to define the set-up parameters related with over-current inhibition.

Optical thyristor operating at 1.55 μm (장파장에서 동작하는 Optical Thyristor)

  • Kim, Doo-Gun;Kim, Hyung-Soo;Jung, Sung-Jae;Choi, Young-Wan;Lee, Seok;Woo, Deok-Ha;Jhon, Young-Min;Yu, Byung-Geel
    • Korean Journal of Optics and Photonics
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    • v.13 no.2
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    • pp.146-150
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    • 2002
  • 1.55${\mu}{\textrm}{m}$ PnpN optical thyristor as a smart optical switch has potential applications in advanced optical communication systems. PnpP optical thyristors operating at 1.55${\mu}{\textrm}{m}$ are proposed and fabricated for the first time. In the optical thyristors, we employ InGaAs/InP multiple quantum well (MQW) for the active n- and p-layers. The thyristors show sufficiently nonlinear s-shape I-V characteristics and spontaneous emission. In the OFF-state, the device has a high-impedance up to switching voltage of 4.03(V). On the other hand, it has low-impedance and emits spontaneous light as a light-emitting diode in the ON-state voltage of 1.77(V), and switching voltage is changed under several light input conditions. It can be used as a header processor in optical asynchronous transfer mode (ATM), as a hard limiter in optical code division multiple access (CDMA) and as a wavelength converter in optical WDM systems.

Voltage Control for a Wind Power Plant Based on the Available Reactive Current of a DFIG and Its Impacts on the Point of Interconnection (이중여자 유도형 풍력발전기 기반 풍력단지의 계통 연계점 전압제어)

  • Usman, Yasir;Kim, Jinho;Muljadi, Eduard;Kang, Yong Cheol
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.1
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    • pp.23-30
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    • 2016
  • Wake effects cause wind turbine generators (WTGs) within a wind power plant (WPP) to produce different levels of active power and subsequent reactive power capabilities. Further, the impedance between a WTG and the point of interconnection (POI)-which depends on the distance between them-impacts the WPP's reactive power injection capability at the POI. This paper proposes a voltage control scheme for a WPP based on the available reactive current of the doubly-fed induction generators (DFIGs) and its impacts on the POI to improve the reactive power injection capability of the WPP. In this paper, a design strategy for modifying the gain of DFIG controller is suggested and the comprehensive properties of these control gains are investigated. In the proposed scheme, the WPP controller, which operates in a voltage control mode, sends the command signal to the DFIGs based on the voltage difference at the POI. The DFIG controllers, which operate in a voltage control mode, employ a proportional controller with a limiter. The gain of the proportional controller is adjusted depending on the available reactive current of the DFIG and the series impedance between the DFIG and the POI. The performance of the proposed scheme is validated for various disturbances such as a reactive load connection and grid fault using an EMTP-RV simulator. Simulation results demonstrate that the proposed scheme promptly recovers the POI voltage by injecting more reactive power after a disturbance than the conventional scheme.

A Power MOSFET Driver with Protection Circuits (보호 회로를 포함한 전력 MOSFET 구동기)

  • Han, Sang-Chan;Lee, Soon-Seop;Kim, Soo-Won;Lee, Duk-Min;Kim, Seong-Dong
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.2
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    • pp.71-80
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    • 1999
  • In this paper, a power MOSFET driver with protection circuits is designed using a 2${\mu}m$ high-voltage CMOS process. For stable operations of control circuits a power managing circuit is designed, and a voltage-detecting short-circuit protection(VDSCP) is proposed to protect a voltage regulator in the power control circuit. The proposed VDSCP scheme eliminates voltage drop caused by a series resistor, and turns off output current under short-circuit state. To protect a power MOSFET, a short-load protection, a gate-voltage limiter, and an over-voltage protection circuit are also designed A high voltage 2 ${\mu}m$ technology provides the breakdown voltage of 50 V. The driver consumes the power of 20 ~ 100 mW along its operation state excluding the power of the power MOSFET. The active area of the power MOSFET driver occupies $3.5 {\times}2..8mm^2$.

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