• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.93-96
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• 2002

It is said that the verification effort occupies about 50-70 percent of the total effort of a System-On-A-Chip. This paper aims to develop a test bench automation tool based on the abstraction of the interface protocols. This tool will allow designers to describe their test benches in a high level language such as C rather than VHDL or Verilog. It helps designers to save their verification time and effort.

• Proceedings of the Korean Information Science Society Conference
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• 2000.04b
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• pp.526-528
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• 2000

디지털 비디오 정보를 효율적으로 관리 검색하기 위한 내용 기반 검색 시스템을 위해서는 내용정보의 추상화가 필수적이다. 지금까지 비디오의 내용정보의 추상화, 특히 의미적 내용 정보의 추출은 사람에 의한 수동적인 방법에 의존한 것이 대부분이었다. 본 논문에서는 MPEGgudtlr의 영화 데이터를 대상으로 폭발 장면 자동 추출을 위한 저급 수준 비디오 내용정보의 추상화 방법을 제안하고, 실제 구현을 통하여 그 유용성을 보인다.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2002.05a
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• pp.272-279
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• 2002

A common task in assembly modeling is the determination of the position and orientation of a set of components by solving the spatial relationships between them. Assembly models could be constructed at various levels of abstraction. They could be classified into component or geometry-level assembly models. The geometry-level assembly design approach using mating constraints such as against and fits is widely used in the commercial modelers, but it may be very tedious in some cases fur designer. In this paper, we propose a new method to construct an assembly model at the component-level by extracting joint mating features from the kinematics constraints specified between components. The assembly model constructed using the proposed method includes hierarchical and relational assembly models, component/sub-assembly positions and degrees of freedom information. The proposed method is more intuitive and natural way of assembly design and it guarantees the topological robustness of assembly modification such as component replacement and modification.

• International Journal of Computer Science & Network Security
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• v.21 no.3
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• pp.287-294
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• 2021

Modern small farms are important link components in the structure of the world agro-industrial complex. It ensures the food and nutritional sustainability of the country exclusively at the local regional level. The purpose of the research is to examine the role of farming in ensuring nutritional security and food stability based on the analysis of the Food Sustainability Index (FSI). Research methods: modeling, abstraction, analogy, analysis, synthesis, formalization, logical abstraction, theoretical cognition, systematization and classification, abstract-logical, etc. Results. Having analyzed the Food Sustainability Index for 2018, it has been established that there is a lack of a clear relationship between the pace of economic development and the level of food and nutritional sustainability. In addition, this study has identified the countries with the largest number of small farms, as well as the number of farms within the region. The correlation between the size of the farm and the area of agricultural land that it cultivates has been determined. The problems faced by small farms in the process of their activity have been analyzed. The programs implemented in the field of agro-industrial complex development by international profile institutions have been systematized. Particularly, the regional structure of agricultural development programs under the guidance of IFAD is defined, as well as the areas to which they are directed. Specific measures taken by governments to stimulate the development of small farms have been outlined. Reasonable conclusions have been formed based on the study. The direction of future research is seen in the assessment of the export potential of small farms in terms of range, volume of export deliveries and geographical direction of movement of their products.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.2
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• pp.177-182
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• 2010

The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In the developing process of a hardware component in system, the design phase has been regarded as a phase consuming lots of time and cost. However, the verification phase in which functionality of the designed component is verified has recently been considered as a much important phase. In this paper, the implementation of a verification environment which is based on SystemC infrastructure and verifies the functionality of a hardware component is described. The proposed verification system uses SystemC user-defined channel as communication interface between variables of SystemC module and registers of Verilog module. The functional verification of an UART is performed on the proposed verification system. SystemC provides class library for hardware modeling and has an advantage of being able to design a system consisting hardware and software in higher abstraction level than register transfer level. Source codes of SystemC modules are reusable with a minor adaptation on verifying functionality of another hardware component.

• International journal of advanced smart convergence
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• v.5 no.3
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• pp.8-15
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• 2016

In recent years, one of deep learning models called Deep Belief Network (DBN) which formed by stacking restricted Boltzman machine in a greedy fashion has beed widely used for classification and recognition. With an ability to extracting features of high-level abstraction and deal with higher dimensional data structure, this model has ouperformed outstanding result on image and speech recognition. In this research, we assess the applicability of deep learning in dna classification level. Since the training phase of DBN is costly expensive, specially if deals with DNA sequence with thousand of variables, we introduce a new encoding method, using decimal-binary vector to represent the sequence as input to the model, thereafter compare with one-hot-vector encoding in two datasets. We evaluated our proposed model with different contrastive algorithms which achieved significant improvement for the training speed with comparable classification result. This result has shown a potential of using decimal-binary vector on DBN for DNA sequence to solve other sequence problem in bioinformatics.

• Journal of Computing Science and Engineering
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• v.2 no.4
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• pp.340-356
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• 2008

The cognitive constraints of the human mind must drive the decisions in architecture and methodology design in order that the systems we build are comprehensible. This paper presents a methodology for the design of time-triggered embedded systems that leads to understandable artifacts. We lift the design process to a higher level of abstractionto the level of computational components that interact solely by the exchange of messages. The time-triggered architecture makes it possible to specify the temporal properties of component interfaces precisely and provides temporally predictable message communication, such that the precise behavior of a large design can be studied in the early phases of a design on the basis of the component interface specifications. This paper shows how the cognitive simplification strategies of abstraction, partitioning and segmentation are supported by the time-triggered architecture and its associated design methodology to construct evolvable embedded systems that can be readily understood and modified.

• Journal of Educational Research in Mathematics
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• v.8 no.2
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• pp.485-494
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• 1998

This study is on the theory of Piaget's reflective abstraction and the mechanism of the development of knowledge and the history of algebra and its application to understand the difficulties that many students have in learning algebra. Piaget considers the development of knowledge as a linear process. The stages in the construction of different forms of knowledge are sequential and each stage begins with reorganization. The reorganization consists of the projection onto a higher level from the lower level and the reflection which reconstructs and reorganizes within a lager system that is transferred by profection. Piaget shows that the mechanisms mediating transitions from one historical period to the next are analogous to those mediating the transition from one psychogenetic stage to the next and characterizes the mechanism as the intra, inter, trans sequence. The historical development of algebra is characterized by three periods, which are intra inter, transoperational. The analysis of the history of algebra by the mechanism explains why the difficulties that students have in learning algebra occur and shows that the roles of teachers are important to help students to overcome the difficulties.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.16 no.5 s.110
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• pp.495-502
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• 2006

A fault diagnosis method is developed in this study using automaton through quantization of vibration signals for normal and faulty conditions, respectively. Automaton is a kind of qualitative model which describes the system behaviour at the level of abstraction. The system behavior was extracted from the probability of the output sequence of vibration signals. The sequence was made as vibration levels by reconstructing the originally measured vibration signals. As an example, a fault diagnosis for the bearing of ATM machine was done, which detected the bearing fault with confident level compared to any other existing methods of kurtosis or spectrum analysis.

• ETRI Journal
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• v.44 no.5
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• pp.837-848
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• 2022

Analog circuit design is comparatively more complex than its digital counterpart due to its nonlinearity and low level of abstraction. This study proposes a novel low-level hybrid of the sine-cosine algorithm (SCA) and modified grey-wolf optimization (mGWO) algorithm for machine learning-based design automation of CMOS analog circuits using an all-CMOS voltage reference circuit in 40-nm standard process. The optimization algorithm's efficiency is further tested using classical functions, showing that it outperforms other competing algorithms. The objective of the optimization is to minimize the variation and power usage, while satisfying all the design limitations. Through the interchange of scripts for information exchange between two environments, the SCA-mGWO algorithm is implemented and simultaneously simulated. The results show the robustness of analog circuit design generated using the SCA-mGWO algorithm, over various corners, resulting in a percentage variation of 0.85%. Monte Carlo analysis is also performed on the presented analog circuit for output voltage and percentage variation resulting in significantly low mean and standard deviation.