• Journal of the Korean Institute of Telematics and Electronics S
• /
• v.34S no.3
• /
• pp.12-23
• /
• 1997

In this paper, we propose a new cell switch fabric for increasing the performance of ATM switching systems. Proposed switching network consists of a sorting network and a routing network. Both of these are multistage networks where each stage performs a fixed permutation on the incoming lines, and then routes them through a clumn of 2x2 switching elements. It is designed for distributing inputs and parallel processing to reduce the hardware complexity and obtain high performance of switching network. The structure and the operation of th eswitching network aredescribed and the performanceof the switching network is anlyzed under uniform traffic models. In this result, though the size of proposed network is increased the large scale, it has always the same throughput as the that of genral output queueing system with N=2. So, it is found that our proposed network is appropriate for the high apeed and lrger size of ATM switching systems.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.21 no.1
• /
• pp.131-143
• /
• 1996

In this paper, we propose the improved structure of fully interconnected ATM Switch to develop the small sized switch element and represent practical implementation of switch network. As the part II of the full study about structure and implementation of fully interconnected ATM Switch, this paper especially describes the implementation of an ATM switching element with 8 input port and 8 output port at 155 Mbits/sec each. The single board switching element is used as a basic switching block in a small sized ATm switch for ATM LAN Hub and customer access node. This switch has dedicated bus in 12 bit width(8 bit data + 4 bit control signal) at each input and output port, bit addressing and cell filtering scheme. In this paper, we propose a practical switch architecture with fully interconnected buses to implement a small-sized switch and to provide multicast function withoutany difficulty. The design of switching element has become feasible using advanced CMOS technology and Embedded Gate Array technology. And, we also represent Application Specific Integrated Circuit(ASIC) of Switch Output Multiplexing Unit(SOMU) and 12 layered Printed Circuit Board for interconnection network of switch.

• Journal of the Microelectronics and Packaging Society
• /
• v.4 no.1
• /
• pp.31-38
• /
• 1997

대용량, 고속정보처리가 요구되는 B-ISDN용 스위칭 모듈은 90년초부터 MCM으로 제작후 사용되어 왔다. 특히 MCM은 Data 처리의 고속성 및 회로의 고집적이 요구되는 ATM, GPS 및 개인휴대 통신 분야에 광범위하게 개발 및 응용되고 있다. 따라서 본논문에 서는 고속, 고집적 ATM 교환기의 Switching Module을 제품의 Low Cost와 다충회로를 간 단하게 구현할수 있는"Diffusion patterning"(이하 DP)공정과 기보유중인 Thin Film 공정으 로 MCM을 구현하였다.CM을 구현하였다.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.25 no.9A
• /
• pp.1441-1451
• /
• 2000

There are two types of protection switching : a) automatic switching and b) forced switching. The switching mechanism is generally realised by OAM functions, therefore, the required OAM information field should be reserved in the PLOAM cells. This paper proposes an unidirectional and a bidirectional protection switching method and potential advantages. The unidirectional protection switching method can be faster than the bidirectional method because the unidirectional method does not require an APS protocol for protection switching. The bidirectional protection switching method uses APS K1 byte and K2 byte, which is included in octets of a PST message through downstream or upstream PLOAM cells, for protection switching. As making comparisons between the unidirectional and the bidirectional protection. switching method, this paper proposes an effective constructing method for ATM-PON network.

• ETRI Journal
• /
• v.18 no.3
• /
• pp.107-125
• /
• 1996

In this paper, we define the general requirements of ATM switching systems such as scalability, distributed fashion, and modularity. Also we propose a practical implementation of a scalable ATM switching system whose capacity can be easily expanded. Firstly, the architecture of the system is discussed with an emphasis on system scalability, modularity of subsystems and the simple control network of the design requirements. Secondly, we suggest the three types of distributed call/connection control schemes that are suitable for our switching system. We also estimate their call processing capacity on the average and make a comparison of them under the various system architectures. Since our scalable switching system can be constructed to perform the call processing functions on the various levels of the system capacity, it has much adaptability at the various evolution phases or regions of the network environment.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.2 no.2
• /
• pp.181-186
• /
• 1998

This paper presents multiplexing structures to provide various subscriber interfaces in an ATM switching system with a high speed internal link, and analyzes the schemes in terms of a mean cell delay and a buffer sin. And we proposed a buffer management strategy to minimize a cell loss and accommodate new ATM transfer capabilities.

• Journal of Internet Computing and Services
• /
• v.5 no.3
• /
• pp.45-56
• /
• 2004

In this paper, we propose ATM switch architecture including ALL type 2 switch which can efficiently transmit low-bit rate data, even if the network has many endpoints. We simulate the architecture of ATM switch fabric that is modeled in computer program and analyze the performance according to offered loads. ATM switch proposed in this paper can support cell switching for all types of m cells which consist of ALL type 1. ALL type 2, ALL type 3/4 and ALL type 5 cells. We propose two switch fabric methods; One supports the ALL type 2 cell processing per input port, the other global ALL type 2 cell processing for every input port. The simulation results show that the latter is superior to the former. But the former has a merit for easy implementation and extensibility. In this paper, the AAL Type 2 switch module which adapts the former method is designed using VHDL language and implemented in FPGA chip. The designed AAL Type 2 switch module operates at 52MHz. The proposed ATM switch fabric is widely applicable to mobile communication, narrow band services over ATM network and wireless ATM as well as general ATM switching fabric.

• ETRI Journal
• /
• v.17 no.1
• /
• pp.23-36
• /
• 1995

We present a performance evaluation model of cell reassembly mechanism in an ATM switching system. An ATM switching system may be designed so that communications between processors of its control part can be performed via its switching network rather than a separate inter-processor communications network. In such a system, there should be interface to convert inter-processor communication traffic from message format to cell format and vice versa, that is, mechanisms to perform the segmentation and reassembly sublayer. In this paper, we employ a continuous-time Markov chain for the performance evaluation model of cell reassembly mechanism with individual buffering, judicially defining the states of the mechanism. Performance measures such as message loss probability and average reassembly delay are obtained in closed forms. Some numerical illustrations are given for the performance analysis and dimensioning of the cell reassembly mechanism.

• ETRI Journal
• /
• v.18 no.4
• /
• pp.229-244
• /
• 1997

Realization of the economical, reliable, and efficient ATM interface block becomes an important key to development of the ATM switching system when we consider new issues raised recently. In this paper, we summarize requirements for the ATM interface block and present the UNI (User Network Interface)/NNI (Network Node Interface) architecture to meet these requirements. We also evaluate the performance of the multiplexer adopting the various multiplexing schemes and service disciplines. For ATM UNI/NNI interface technologies, we have developed a new policing device using the priority encoding scheme. It can reduce the decision time for policing significantly. We have also designed a new spacer that can space out the clumped cell stream almost perfectly. This algorithm guarantees more than 99 % conformance to the negotiated peak cell rate. Finally, we propose the interface architecture for accommodation of the ABR (Available Bit Rate) transfer capability. The proposed structure that performs virtual source and virtual destination functions as well as a switch algorithm can efficiently accommodate the ABR service.

• Journal of Internet Computing and Services
• /
• v.4 no.6
• /
• pp.69-73
• /
• 2003

ATM and Ethernet are desirable transport mechanisms for the realization MAN(Metropolitan Area Networks). A relatively small sized switching system for MAN based on ATM is proposed and its performance is evaluated in this paper. For the performance evaluation, traffics should be firstly modeled because they are highly bursty. By varing the ratio of VBR traffics, detrimental effect of VBR traffics may be observed. Traffic load at each input port is also varied, From the results of simulation, operation conditions of the system to meet required QoS are obtained.