• 아태비즈니스연구
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• 제11권2호
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• pp.45-60
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• 2020

Purpose - This study examines the impact of company ownership nature and of the dual role of CEO and board chair on R & D investment intensity, as well as the moderating effect of this dual role. Most previous research focused on the impact of the dual role of CEO and board chair on firm performance. Design/methodology/approach - This study uses A-share companies listed on the Shenzhen and Shanghai stock exchanges in China from 2008 to 2017. The univariate and the multivariate regression analysis were hired In order to analyze the data. Findings - The results show that there is a significant negative relationship between state-owned companies and R & D investment intensity. In addition, there is a significant positive relationship between the dual role and R & D investment intensity. The effect of state ownership on R & D investment intensity is more negative when CEO-board chair duality exists. This means that in case of state-owned companies, if CEO serves as the board chair, the propensity to invest in R&D is further reduced. Research implications or Originality - This is a pioneering study that considers the joint effect of state-owned companies and dual role on R & D investment intensity in the Chinese economy.

• 수산해양기술연구
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• 제30권2호
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• pp.71-77
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• 1994

A serious of study is carried out to practical use of the three-slot cambered otter board improved by the authors. As the first step, we designed main plates, slots and accessories, such as holding plate, fan-shaped towing plate, normans, center ring, etc. Standing on this design, we made the simple cambered and three-slot cambered model otter board with accessories in a linear scale 6:1. and carried out model test to examine the efficiency of these boards. The obtained results can be summarized as follows: 1. On the simple cambered board with accessories, the values of the maximum shear coefficient($C _{LX}$ ). drag coefficient(($C _{D}$) and hydrodynamic efficiency($C _{L}$/$C _{D}$ ) are 1.39, 0.56, 2.48 at $22^{\circ}$ of the angle of stall respectively. 2. On the three-slot cambered board with accessories, $C _{LX}$/$C _{D}$ and $C _{I}$/$C _{D}$ are 1.67, 0.92, 1.82 at $32^{\circ}$ of the angle of stall respectively. 3.$C _{LX}$ of board with accessories is smaller 10~12% than that of only the main plate, and the angle of stall is almost same. 4. $C _{LX}$ and the angle of stall of the three-slot cambered board with accessories are greater 20% and $10^{\circ}$ than that of the simple cambered board respectively.

• 대한전기학회논문지:시스템및제어부문D
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• 제49권11호
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• pp.637-642
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• 2000

IEEE 1149.1 boundary scan architecture is used as a standard in board-level system testing. The simplicity of this architecture is an advantage in system testing, but at the same time, it it makes a limitation of applications. Because of several problems such as 3-state net conflicts, or ambiguity issues, interconnect testing for multi-drop multi-board systems is more difficult than that of single board systems. A new approach using IEEE 1149.1 boundary scan architecture for multi-drop multi-board systems is developed in this paper. Adding boundary scan cells on backplane bus lines, each board has a complete scan-chain for interconnect test. This new scan-path insertion method on backplane bus using limited 1149.1 test bus less area overhead and mord efficient than previous approaches.

• 마이크로전자및패키징학회지
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• 제18권2호
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• pp.35-41
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• 2011

Recently, board level solder joint reliability performance of IC packages during drop impact becomes a great concern to semiconductor and electronic product manufacturers. The handheld electronic products are prone to being dropped during their useful service life because of their size and weight. The IC packages are susceptible to solder joint failures, induced by a combination of printed circuit board (PCB) bending and mechanical shock during impact. The board level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this paper, applying the JEDEC (JESD22-B111) standard present a finite element modeling of the FBGA. The simulation results revealed that maximum stress was located at the outermost solder ball in the PCB or IC package side, which consisted well with the location of crack initiation observed in the failure analysis after drop reliability tests.

• 전력전자학회논문지
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• 제18권5호
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• pp.443-447
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• 2013

This paper deals with LLC resonant converter of on-board charger for electric vehicle charging. Generally, the on-board charger must have a very widely charging voltage, higher efficiency, higher power factor, lower volume and lower weight. For reducing the switching losses, voltage and current stress of the device, the on-board charger is apply the half-bridge LLC resonant converter topology. To have a wide voltage range, it is design the hardware parameters and determine the switching frequency range of the LLC resonant converter. The experimental results show a wide charge voltage.

• 산업기술연구
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• 제15권
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• pp.83-91
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• 1995

This paper presents the design of a smart A/D conversion interface used for measuring the load of a truck. Since the load-cell sensor to be used is very sensitive for weight variation, the interface board must have the low-drift and the A/D conversion for accuracy. A new integrator and comparator has been developed to reduce the offset voltage and the drift current of operational amplifiers and has been adapted into the interface board. Also, a software algorithm has been developed to obtain the stable and accrurate A/D conversion. This software includes a RS-485 communication program to control the interface, which gives a capability of backing-up the calibration data and transferring control data. The test and evaluation of the designed interface has been shown as having the better performance compared to the other types of existing weighing systems and sensor instruments.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국내학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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• pp.457-461
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• 1988

In this study an one-board micom controlled precision temperature control system has been developed. The digital temperature control system is consisted of an one-board micom as digital controller, a 12-bit A/D and D/A converter, a power amplifier, a NTC thermister, a preamplfier and a heat chamber. An operating control program for the control system was written in Z80 machine language. A Dual-PID predictor control algorithm was proposed. Experments were conducted with different sampling time and limitted error value. As a result, the temperature in a heat chamber can be well controlled within +- 0.2 .deg.C when the sampling time was applied to 10 sec and the limitted error value +- 0.5 .deg.C under the dual-PID predictor control algorithm. By means of one-board micom overall system has been reduced in size and volume, thus the system becomes compact and less expensive.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2007년도 추계종합학술대회
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• pp.131-134
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• 2007

본 논문에서는 알고리즘의 테스트 패턴중 하나인 1D-CZP패턴의 하드웨어 구현을 제안한다. FPGA를 통한 알고리즘 검증 시 센서로부터 받아들이는 정보로만은 알고리즘의 완벽한 장상작동 유무를 판단하기 어렵기 때문에, 내부 패턴 Generator를 사용하여 센서의 정보와 함께 알고리즘의 정상작동 유무를 판단하게 된다. 본 논문은 필터의 주파수 특성 판단에 용이하며, 입력이 랜덤한 특징을 가지는 1D-CZP패턴을 ROM Table형태로 구현하며, 구현 시 사용되는 Modulus연산을 효율적으로 수정함으로, 하드웨어 사이즈가 작아진 1D-CZP패턴을 제안한다.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2005년도 전기학술대회논문집
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• pp.1108-1112
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• 2005

Recently, the fuel charge is accounted for very high in the navigation cost. Therefore Shipowner is tried to find method for reducing oil consumption. ERCS(Energy Reduced Cooling System) is one of the method. The ERCS algorithm operates to decrease a power consumption of main sea water cooling pump through inverter control. We have developed ERCS controller with algorithm. The ERCS controller consists of CPU board, Digital I/O board, A/D board, D/A board and LCD/SW board. We tested with dummy signal to confirm the algorithm working correctly and achieved the good results. Before soon we will test under real condition in the ship and expect to get the result as forecasted.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2007년도 SMT/PCB 기술세미나
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• pp.37-47
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• 2007

Factor : Structure Metal pad & SMO size Board level TC test : - Large SMO size better Board level Drop test : - Large SMO size better Factor : Structure Substrate thickness Board level TC test : - Thick substrate better Board level Drop test : - Substrate thickness is not a significant factor for drop test Factor : Material Solder alloy Board level TC test : - Not so big differences over Pb-free solder and NiAu, OSP finish Board level Drop test : - Ni/Au+SAC105, CuOSP+LF35 are better Factor : Material Pad finish Board level TC test : - NiAu/NiAu is best Board livel Drop test : - CuOSP is best Factor : Material Underfill Board level TC test - Several underfills (reworkable) are passed TCG x500 cycles Board level Drop test : - Underfill lots have better performance than non-underfill lots Factor : Process Multiple reflow Board level TC test : - Multiple reflow is not a significant actor for TC test Board level Drop test : N/A Factor : Process Peak temp Board level TC test : - Higher peak temperature is worse than STD Board level Drop test : N/A Factor : Process Stack method Board level TC test : - No big difference between pre-stack and SMT stack Board level Drop test : - Flux dipping is better than paste dipping but failure rate is more faster