• Title/Summary/Keyword: A/D board

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Nature of Company Ownership, the Dual Role of CEO and Board Chair, and R & D Investment Intensity

  • Meng, La-Mei;Byun, Hae-Young
    • Asia-Pacific Journal of Business
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    • v.11 no.2
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    • pp.45-60
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    • 2020
  • Purpose - This study examines the impact of company ownership nature and of the dual role of CEO and board chair on R & D investment intensity, as well as the moderating effect of this dual role. Most previous research focused on the impact of the dual role of CEO and board chair on firm performance. Design/methodology/approach - This study uses A-share companies listed on the Shenzhen and Shanghai stock exchanges in China from 2008 to 2017. The univariate and the multivariate regression analysis were hired In order to analyze the data. Findings - The results show that there is a significant negative relationship between state-owned companies and R & D investment intensity. In addition, there is a significant positive relationship between the dual role and R & D investment intensity. The effect of state ownership on R & D investment intensity is more negative when CEO-board chair duality exists. This means that in case of state-owned companies, if CEO serves as the board chair, the propensity to invest in R&D is further reduced. Research implications or Originality - This is a pioneering study that considers the joint effect of state-owned companies and dual role on R & D investment intensity in the Chinese economy.

Model Test on the Three-Slot Cambered Otter Board with Accessories (부속구를 부착한 슬롯 만곡형전개판의 성능에 관한 모형실험)

  • Gwon, Byeong-Guk;Go, Gwan-Seo
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.30 no.2
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    • pp.71-77
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    • 1994
  • A serious of study is carried out to practical use of the three-slot cambered otter board improved by the authors. As the first step, we designed main plates, slots and accessories, such as holding plate, fan-shaped towing plate, normans, center ring, etc. Standing on this design, we made the simple cambered and three-slot cambered model otter board with accessories in a linear scale 6:1. and carried out model test to examine the efficiency of these boards. The obtained results can be summarized as follows: 1. On the simple cambered board with accessories, the values of the maximum shear coefficient($C _{LX}$ ). drag coefficient(($C _{D}$) and hydrodynamic efficiency($C _{L}$/$C _{D}$ ) are 1.39, 0.56, 2.48 at $22^{\circ}$ of the angle of stall respectively. 2. On the three-slot cambered board with accessories, $C _{LX}$/$C _{D}$ and $C _{I}$/$C _{D}$ are 1.67, 0.92, 1.82 at $32^{\circ}$ of the angle of stall respectively. 3.$C _{LX}$ of board with accessories is smaller 10~12% than that of only the main plate, and the angle of stall is almost same. 4. $C _{LX}$ and the angle of stall of the three-slot cambered board with accessories are greater 20% and $10^{\circ}$ than that of the simple cambered board respectively.

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New IEEE 1149.1 Boundary Scan Architecture for Multi-drop Multi-board System (멀티 드롭 멀티 보드 시스템을 위한 새로운 IEEE 1149.1 경계 주사 구조)

  • Bae, Sang-Min;Song, Dong-Sup;Kang, Sung-Ho;Park, Young-Ho
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.49 no.11
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    • pp.637-642
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    • 2000
  • IEEE 1149.1 boundary scan architecture is used as a standard in board-level system testing. The simplicity of this architecture is an advantage in system testing, but at the same time, it it makes a limitation of applications. Because of several problems such as 3-state net conflicts, or ambiguity issues, interconnect testing for multi-drop multi-board systems is more difficult than that of single board systems. A new approach using IEEE 1149.1 boundary scan architecture for multi-drop multi-board systems is developed in this paper. Adding boundary scan cells on backplane bus lines, each board has a complete scan-chain for interconnect test. This new scan-path insertion method on backplane bus using limited 1149.1 test bus less area overhead and mord efficient than previous approaches.

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A Study on the/ Correlation Between Board Level Drop Test Experiment and Simulation

  • Kang, Tae-Min;Lee, Dae-Woong;Hwang, You-Kyung;Chung, Qwan-Ho;Yoo, Byun-Kwang
    • Journal of the Microelectronics and Packaging Society
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    • v.18 no.2
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    • pp.35-41
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    • 2011
  • Recently, board level solder joint reliability performance of IC packages during drop impact becomes a great concern to semiconductor and electronic product manufacturers. The handheld electronic products are prone to being dropped during their useful service life because of their size and weight. The IC packages are susceptible to solder joint failures, induced by a combination of printed circuit board (PCB) bending and mechanical shock during impact. The board level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this paper, applying the JEDEC (JESD22-B111) standard present a finite element modeling of the FBGA. The simulation results revealed that maximum stress was located at the outermost solder ball in the PCB or IC package side, which consisted well with the location of crack initiation observed in the failure analysis after drop reliability tests.

Development of Battery Charger for Electric Vehicle using the LLC Resonant Converter (LLC 공진형 컨버터를 적용한 전기자동차 고압배터리 충전기 개발)

  • Kim, Gyoung-Man;Yoo, Jong-Uk;Kim, Tae-Kwon;Kang, Chan-Ho;Chun, Tae-Won
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.5
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    • pp.443-447
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    • 2013
  • This paper deals with LLC resonant converter of on-board charger for electric vehicle charging. Generally, the on-board charger must have a very widely charging voltage, higher efficiency, higher power factor, lower volume and lower weight. For reducing the switching losses, voltage and current stress of the device, the on-board charger is apply the half-bridge LLC resonant converter topology. To have a wide voltage range, it is design the hardware parameters and determine the switching frequency range of the LLC resonant converter. The experimental results show a wide charge voltage.

Development of Smart Interface Board for Truck Scale Load Cell (Truck Scale 용 Load Cell의 Smart Interface Board 개발)

  • Park, Chan-Won;Park, Chong-Yeon;Hong, Jae-Yong;Choi, Gyu-Suk;An, Kwang-Hee
    • Journal of Industrial Technology
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    • v.15
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    • pp.83-91
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    • 1995
  • This paper presents the design of a smart A/D conversion interface used for measuring the load of a truck. Since the load-cell sensor to be used is very sensitive for weight variation, the interface board must have the low-drift and the A/D conversion for accuracy. A new integrator and comparator has been developed to reduce the offset voltage and the drift current of operational amplifiers and has been adapted into the interface board. Also, a software algorithm has been developed to obtain the stable and accrurate A/D conversion. This software includes a RS-485 communication program to control the interface, which gives a capability of backing-up the calibration data and transferring control data. The test and evaluation of the designed interface has been shown as having the better performance compared to the other types of existing weighing systems and sensor instruments.

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A precision temperature control system using one-board micom (One-board micom을 이용한 정밀 온도 제어 시스템)

  • 주해호;조덕현
    • 제어로봇시스템학회:학술대회논문집
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    • 1988.10a
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    • pp.457-461
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    • 1988
  • In this study an one-board micom controlled precision temperature control system has been developed. The digital temperature control system is consisted of an one-board micom as digital controller, a 12-bit A/D and D/A converter, a power amplifier, a NTC thermister, a preamplfier and a heat chamber. An operating control program for the control system was written in Z80 machine language. A Dual-PID predictor control algorithm was proposed. Experments were conducted with different sampling time and limitted error value. As a result, the temperature in a heat chamber can be well controlled within +- 0.2 .deg.C when the sampling time was applied to 10 sec and the limitted error value +- 0.5 .deg.C under the dual-PID predictor control algorithm. By means of one-board micom overall system has been reduced in size and volume, thus the system becomes compact and less expensive.

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Implemention of ID-CZP pattern for system verification through FPGA board (FPGA board를 통한 시스템 검증용 1D-CZP 패턴의 구현)

  • Park, Jung-Hwan;Jang, Won-Woo;Lee, Sung-Mok;Kim, Joo-Hyun;Kang, Bong-Soon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.10a
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    • pp.131-134
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    • 2007
  • In this paper, we propose the 1D-CZP pattern for FPGA verification. The algorithm that was implemented by Verilog-HDL on FPGA board is verified before the chip is producted. Input through the external sensor might not be enough to verify the algorithm on FPGA board. Hence, both external input and internal input can lead the verification of the algorithm. This paper suggests the hardware implementation of compact 1D-CZP pattern that has the random input. It is useful to analyze the characteristics of the filter frequencies and organized as ROM Table which is efficient to Modulus operation.

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A Study on the Energy Reduced Cooling System for the Ship (선박용 에너지 절감형 냉각시스템에 관한 연구)

  • Oh, Jin-Seok;Lim, Kyu-Myung;Jin, Sun-Ho;Kwak, Jun-Ho;Jo, Kwan-Jun;Yu, Byung-Rang;Bae, Byung-Deok
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2005.06a
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    • pp.1108-1112
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    • 2005
  • Recently, the fuel charge is accounted for very high in the navigation cost. Therefore Shipowner is tried to find method for reducing oil consumption. ERCS(Energy Reduced Cooling System) is one of the method. The ERCS algorithm operates to decrease a power consumption of main sea water cooling pump through inverter control. We have developed ERCS controller with algorithm. The ERCS controller consists of CPU board, Digital I/O board, A/D board, D/A board and LCD/SW board. We tested with dummy signal to confirm the algorithm working correctly and achieved the good results. Before soon we will test under real condition in the ship and expect to get the result as forecasted.

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Board Level Reliability Evaluation for Package on Package

  • Hwang, Tae-Gyeong;Chung, Ji-Young
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2007.04a
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    • pp.37-47
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    • 2007
  • Factor : Structure Metal pad & SMO size Board level TC test : - Large SMO size better Board level Drop test : - Large SMO size better Factor : Structure Substrate thickness Board level TC test : - Thick substrate better Board level Drop test : - Substrate thickness is not a significant factor for drop test Factor : Material Solder alloy Board level TC test : - Not so big differences over Pb-free solder and NiAu, OSP finish Board level Drop test : - Ni/Au+SAC105, CuOSP+LF35 are better Factor : Material Pad finish Board level TC test : - NiAu/NiAu is best Board livel Drop test : - CuOSP is best Factor : Material Underfill Board level TC test - Several underfills (reworkable) are passed TCG x500 cycles Board level Drop test : - Underfill lots have better performance than non-underfill lots Factor : Process Multiple reflow Board level TC test : - Multiple reflow is not a significant actor for TC test Board level Drop test : N/A Factor : Process Peak temp Board level TC test : - Higher peak temperature is worse than STD Board level Drop test : N/A Factor : Process Stack method Board level TC test : - No big difference between pre-stack and SMT stack Board level Drop test : - Flux dipping is better than paste dipping but failure rate is more faster

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