• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.650-656
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• 2016

Voltage controlled oscillator (VCO) is widely used circuit component in high-performance microprocessors and modern communication systems as a frequency source. In present work, VCO designs using the different combination of NAND gates with three transistors and CMOS inverter are reported. Three, five and seven stages ring VCO circuits are designed. Coarse and fine tuning have been done using two different supply sources. The frequency with coarse tuning varies from 3.31 GHz to 5.60 GHz in three stages, 1.77 GHz to 3.26 GHz in five stages and 1.27 GHz to 2.32 GHz in seven stages VCO respectively. Moreover, for fine tuning frequency varies from 3.70 GHz to 3.94 GHz in three stages, 2.04 GHz to 2.18 GHz in five stages and 1.43 GHz to 1.58 GHz in seven stages VCO respectively. Results of power consumption and phase noise for the VCO circuits are also been reported. Results of proposed VCO circuits have been compared with previously reported circuits and present circuit approach show significant improvement.

• Journal of Advanced Navigation Technology
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• v.27 no.3
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• pp.281-286
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• 2023

This paper proposes a design of a wideband array antenna involving the downlink bands of fixed satellite service (FSS) and broadcasting satellite service (BSS) by applying two mixed patch sets. The proposed antenna is implemented on FR4 substrate by arranging rectangular patches in 6 by 2. To design a wideband antenna (10.7~12.75 GHz) covering both FSS downlink bands (10.7~10.95 GHz, 11.2~11.45 GHz) and BSS downlink bands (11.7~12.5 GHz, 12.2~12.75 GHz, 11.7~12.2 GHz), rectangular patches working at 11.5 GHz and 12.5 GHz are arranged alternately, and thus the proposed antenna can obtain a wide bandwidth equivalent to 30.8% of the center frequency. The proposed antenna was fabricated and measured, and the results are well matched with the simulated ones. From the performances, the proposed antenna can be applied to the receiving antenna for FSS and BSS downlinks.

• Journal of IKEEE
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• v.11 no.1 s.20
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• pp.15-23
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• 2007

This paper describes a dual frequency synthesizer designed in a 0.2$\mu$m CMOS technology for wireless LAN applications. The design is focused mainly on low-power characteristics. Power dissipation is minimized especially in VCO and prescaler design. The designed synthesizer includes all building blocks for elimination of external components, other than the crystal. Its operating frequency can be programmed by external data. It operates in the frequency range of 2.3GHz to 2.7GHz (RF) and 250MHz to 800MHz (IF) and consumes 5.14mA at 2.5GHz and 1.08mA at 0.5GHz from a 2.5V supply. The measured phase noise is -85dBc/Hz in-band and -105dBc/Hz at 1MHz offset at IF band. The die area is 1.7mm$\times$1.7mm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.1
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• pp.8-14
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• 2016

In this paper, a compact CPW-fed antenna for 5 GHz (5.15-5.35 GHz, 5.725-5.825 GHz) band WLAN applications is presented. The designed antenna's shape is step structure. The antenna is fabricated and measured into FR-4 substrate of dielectric comstant 4.2 and thickness 1.0 mm with optimized parameters obtained by simulation. We confirm that it is operated as antenna for WLAN applications by obtaining the measured return loss level of < -10 dB in 5.133-5.982 GHz. The dimensions of the antenna ($20.0{\times}16.0{\times}1.0mm^3$) shows an compactness of about 67.17% with respect to a conventional folded slot antenna.

• Journal of Advanced Navigation Technology
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• v.22 no.5
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• pp.449-455
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• 2018

For the size reduction, we propose a microstrip-fed monopole antenna with half X-slot in the radiation patch and cover WLAN dual band 2.4 GHz band (2.4 ~ 2.484 GHz) and 5 GHz band (5.15 ~ 5.825 GHz). The frequency characteristics such as impedance bandwidth and resonant frequencies were satisfied by optimizing the numerical values of various parameters, while the reflection loss in 5 GHz was improved by using defected ground structure (DGS). The proposed antenna is designed and fabricated on a FR-4 substrate with dielectric constant 4.3, thickness of 1.6 mm, and size of $24{\times}41mm^2$. The measured impedance bandwidths (${\mid}S_{11}{\mid}{\leq}-10dB$) of fabricated antenna are 450 MHz (2.27 ~ 2.72 GHz) in 2.4 GHz band and 1340 MHz (4.79 ~ 6.13 GHz) in 5 GHz band which sufficiently satisfied with the IEEE 802. 11n standard in dual band. In particular, radiation patterns which are stable as well as relatively omni-direction could be obtained, and the gain of antennas in each band was 1.31 and 1.98 dBi respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.5 s.108
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• pp.416-422
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• 2006

In this paper, we have designed and favricated the high gain and wideband microstrip patch antenna including IEEE 802.11a. To widen the bandwidth of microstrip antenna, firstly we have used the microstrip line-coaxial probe feeding method and inserted a U-slot in the rectangular patch. Secondly, to improve the antenna gain, we have used a $2{\times}2$ array structure. From the measured results, wideband characteristics of 1 GHz bandwidth($5.110{\sim}6.142$ GHz) for VSWR<2 was obtained. The measured eain was 13 dBi in both the E-plane and H-plane at the frequency of 5.15 GHz, 5.35 GHz, 5.50 GHz, and 5.85 GHz.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.1
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• pp.137-146
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• 2009

We present a micromechanical digital-to-analog (DA) variable capacitor using a parallel digital actuator array, capable of accomplishing high-Q tuning. The present DA variable capacitor uses a parallel interconnection of digital actuators, thus achieving a low resistive structure. Based on the criteria for capacitance range ($0.348{\sim}1.932$ pF) and the actuation voltage (25 V), the present parallel DA variable capacitor is estimated to have a quality factor 2.0 times higher than the previous serial-parallel DA variable capacitor. In the experimental study, the parallel DA variable capacitor changes the total capacitance from 2.268 to 3.973 pF (0.5 GHz), 2.384 to 4.197 pF (1.0 GHz), and 2.773 to 4.826 pF (2.5 GHz), thus achieving tuning ratios of 75.2%, 76.1%, and 74.0%, respectively. The capacitance precisions are measured to be $6.16{\pm}4.24$ fF (0.5 GHz), $7.42{\pm}5.48$ fF (1.0 GHz), and $9.56{\pm}5.63$ fF (2.5 GHz). The parallel DA variable capacitor shows the total resistance of $2.97{\pm}0.29\;{\Omega}$ (0.5 GHz), $3.01{\pm}0.42\;{\Omega}$ (1.0 GHz), and $4.32{\pm}0.66\;{\Omega}$ (2.5 GHz), resulting in high quality factors which are measured to be $33.7{\pm}7.8$ (0.5 GHz), $18.5{\pm}4.9$ (1.0 GHz), and $4.3{\pm}1.4$ (2.5 GHz) for large capacitance values ($2.268{\sim}4.826$ pF). We experimentally verify the high-Q tuning capability of the present parallel DA variable capacitor, while achieving high-precision capacitance adjustments.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.5
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• pp.435-443
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• 2009

In this paper, we propose a microstrip slot antenna that works in Bluetooth, Zigbee, WiMAX and WLAN frequency bands($2.4{\sim}5.825\;GHz$). To get the wide bandwidth from the microstrip antenna proposed, we insert a pair of parastic strips along the feed line on the FR-4 dielectric substance(${\varepsilon}_r=4.8$). Furthermore, a simple geometrical rotation with quadrilateral slot is designed to maximize the bandwidth and to gain a wider frequency band than the conventional rectangular slot antenna. A additional design of the loop type is added to a cactus-shaped patched for 2.4 GHz ISM frequency band. The total measured bandwidth of the antenna is from 2.4 GHz to 6 GHz and the maximum gains of the antenna are 3.82 dBi, 4.48 dBi, 6.41 dBi and 6.65 dBi at the frequencies of 2.4 GHz, 3.5 GHz, 5.25 GHz and 5.77 GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.2
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• pp.1-5
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• 2011

For measuring quad-band module system using WiBro network, frequency converter was developed. The size of the fabricated frequency converter is $3.1cm{\times}3.1cm{\times}0.4cm$. Noise figure of the receiver part of the frequency converter was 2.62 ~ 3.45 dB, EVM of that is -37.5 dB ~ -34.5 dB. And EVM of the transmission part was -42.5 ~ -35.5 dB. Quad-band module was fabricated with the developed frequency converter. Testing the quad-band module in 2.3 GHz WiBro network results the excellent internet connection for 2.5 GHz, 3.5 GHz and 5.5 GHz band.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.56-61
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• 2010

In this paper, high efficient power amplifier with dual band has been realized. Dual band power amplifier have used modify stub matching for single FET, center frequency 2.14GHz and 5.2GHz respectively. The dual-band operation of the CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Because the control of the all harmonic components is very difficult m dual-band, we have managed only the second- and third-harmonics to obtain the high efficiency with the CRLH TL in dual-band. Dual-band characteristics in the output has to balance. Two operating frequencies are chosen at 2.14 GHz and 5.2 GHz in this work. The measured results show that the output power of 28.56 dBm and 29 dBm was obtained at 2.14 GHz and 5.2 GHz, respectively. At this point, we have obtained the power-added efficiency (PAE) of 65.824 % and 69.86 % at two operation frequencies, respectively.