• Title/Summary/Keyword: 3D sampling

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Simplified DC Calculation Method for Simplified Depth Coding Mode of 3D High Efficiency Video Coding

  • Jo, Hyunho;Lee, Jin Young;Choi, Byeongdoo;Sim, Donggyu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.3
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    • pp.139-143
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    • 2014
  • This paper proposes a simplified DC calculation method for simplified depth coding (SDC) mode of 3D High Efficiency Video Coding (3D-HEVC) to reduce the computational complexity. For the computational complexity reduction, the current reference software of 3D-HEVC employs reference samples sub-sampling method. However, accumulation, branch, and division operations are still utilized and these operations increase computational complexity. The proposed method calculates DC value without those operations. The experimental results show that the proposed method achieves 0.1% coding gain for synthesized views in common test condition (CTC) with the significantly reduced number of computing operations.

Design of Ku-Band Phase Locked Harmonic Oscillator (Ku-Band용 위상 고정 고조파 발진기 설계)

  • Lee Kun-Joon;Kim Young-Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.1 s.92
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    • pp.49-55
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    • 2005
  • In this paper, the phase locked harmonic oscillator(PLHO) using the analog PLL(Phase Locked Loop) is designed and implemented for a wireless LAN system. The harmonic oscillator is consisted of a ring resonator, a varactor diode and a PLL circuit. Because the fundamental fiequency of 8.5 GHz is used as the feedback signal for the PLL and the 2nd harmonic of 17.0 GHz is used as the output, a analog frequency divider for the phase comparison in the PLL system can be omitted. For the simple PLL circuit, the SPD(Sampling Phase Detector) as a phase comparator is used. The output power of the phase locked harmonic oscillator is 2.23 dBm at 17 GHz. The fundamental and 3rd harmonic suppressions are -31.5 dBc and -29.0 dBc, respectively. The measured phase noise characteristics are -87.6 dBc/Hz and -95.4 dBc/Hz at the of offset frequency of 1 kHz and 10 kHz from the carrier, respectively.

A Study on the Sound Proof Efficiency of Windows for Road Traffic Noise (도로변 건물의 창문과 방음효과에 대한 평가)

  • 박성배;신재영;정종흡;정일현
    • Journal of Environmental Health Sciences
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    • v.21 no.4
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    • pp.56-62
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    • 1995
  • Recently, the traffic noise around residences and schools has become a serious social problem with the increase of the amount of transportation. This study was performed to investigate the sound proof efficiency of windows for traffic noise. The results were as follows 1) The traffic noise in 19 sites among 22 sampling sites was higher value than 65 dB(A) being roadside environment standard level in the daytime when all windows were opened, while the noise in 22 sampling sites was transmitted below standard level when all windows were closed. 2) The transmission loss of sound level at single window and double windows were 10~25 dB(A) and 11~29 dB(A) respectively. 3) The transmission loss of sound level at sampled school with sound proof pannel was 7~8 dB (A), which was lower 2~7 dB(A) than the theoretical value of the influence assessment . 4) The construction cost of double windows was lower 28% even if include the cost of setting up air conditioner for the summer season and the power consuming cost for its operation than that of sound proof pannel for traffic noise. 5) The effect of transmission loss of windows was more influenced by airtight than materials of windows.

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Analysis between elemental image size and object locations in the pickup using periodically-distributed lenslets and enhancement of computational integral imaging (주기적으로 배치된 렌즈 배열 픽업에서의 요소 영상 크기와 3차원 물체 위치와의 해석과 컴퓨터 집적 영상 복원 화질 개선 방법)

  • Yoo, Hoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.5
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    • pp.1171-1176
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    • 2011
  • This paper describes an analysis on the relationship between elemental image size and object locations in the computational integral imaging reconstruction and in the pickup using a periodically-distributed lenslet array. A sparse sampling effect arises from a periodically-distributed lenslet array in the pickup of 3D objects. The relationship between elemental image size and object location is also reported. Based on the analysis, a method to eliminate the sparse sampling is proposed. To show the effectiveness of the proposed method, experimental results are carried out. It turns out that the theory works.

Error-Resilience Enhancement based on Polyphase Down Sampling for the H.264 Video Coding Technology (에러 강인성 향상을 위한 다상 다운 샘플링 적용 H.264 동영상 부호화 기술)

  • Jung, Eun Ku;Jia, Jie;Kim, Hae Kwang;Choi, Hae Chul;Kim, Jae Gon
    • Journal of Broadcast Engineering
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    • v.10 no.3
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    • pp.340-347
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    • 2005
  • This paper presents a polyphase down sampling based multiple description coding applied to H.264 video coding standard. For a given macroblock, a residual macroblock is calculated by motion estimation, and before applying DCT, quantization and entrophy coding of the H.264 coding process, the polyphase down sampling is applied to the residual macroblock to code in four separate descriptions. Experiments were performed for all the 9 test sequences of JVT SVC standardization in various packet loss patterns. Experimental results show that the proposed one gives 0.5 to 5 dB enhancement over an error-concealment based on the slice group map technolgoy.

An 8b 52 MHz CMOS Subranging A/D Converter Design for ISDN Applications (광대역 종합 통신망 응용을 위한 8b 52 MHz CMOS 서브레인징 A/D 변환기 설계)

  • Hwang, Sung-Wook;Lee, Seung-Hoon
    • Journal of IKEEE
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    • v.2 no.2 s.3
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    • pp.309-315
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    • 1998
  • This paper describes an 8b 52 MHz CMOS subranging analog-to-digital converter (ADC) for Integrated Services Digital Network (ISDN) applications. The proposed ADC based on the improved time-interleaved architecture removes the holding time which is typically observed in the conventional double-channel subranging ADCs to increase throughput rate. Moreover, the ADC employs the interpolation technique in the back-end subranging ADCs far residue signal processing to minimize die area and power consumption. The fabricated and measured prototype ADC in a 0.8 um n-well double-poly double-metal CMOS process typically shows a 52 MHz sampling rate at a 5 V supply voltage with 230 mW, and a 40 MHz sampling rate at a 3 V power supply with 60 mW power consumption.

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DL-RRT* algorithm for least dose path Re-planning in dynamic radioactive environments

  • Chao, Nan;Liu, Yong-kuo;Xia, Hong;Peng, Min-jun;Ayodeji, Abiodun
    • Nuclear Engineering and Technology
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    • v.51 no.3
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    • pp.825-836
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    • 2019
  • One of the most challenging safety precautions for workers in dynamic, radioactive environments is avoiding radiation sources and sustaining low exposure. This paper presents a sampling-based algorithm, DL-RRT*, for minimum dose walk-path re-planning in radioactive environments, expedient for occupational workers in nuclear facilities to avoid unnecessary radiation exposure. The method combines the principle of random tree star ($RRT^*$) and $D^*$ Lite, and uses the expansion strength of grid search strategy from $D^*$ Lite to quickly find a high-quality initial path to accelerate convergence rate in $RRT^*$. The algorithm inherits probabilistic completeness and asymptotic optimality from $RRT^*$ to refine the existing paths continually by sampling the search-graph obtained from the grid search process. It can not only be applied to continuous cost spaces, but also make full use of the last planning information to avoid global re-planning, so as to improve the efficiency of path planning in frequently changing environments. The effectiveness and superiority of the proposed method was verified by simulating radiation field under varying obstacles and radioactive environments, and the results were compared with $RRT^*$ algorithm output.

Design of a 7-bit 2GSPS Folding/Interpolation A/D Converter with a Self-Calibrated Vector Generator (자체보정 벡터 발생기를 이용한 7-bit 2GSPS A/D Converter의 설계)

  • Kim, Seung-Hun;Kim, Dae-Yun;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.4
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    • pp.14-23
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    • 2011
  • In this paper, a 7-bit 2GSPS folding/interpolation A/D Converter(ADC) with a Self-Calibrated Vector Generator is proposed. The ADC structure is based on a folding/interpolation architecture whose folding/interpolation rate is 4 and 8, respectively. A cascaded preprocessing block is not only used in order to drive the high input signal frequency, but the resistive interpolation is also used to reduce the power consumption. Based on a novel self-calibrated vector generator, further, offset errors due to device mismatch, parasitic resistors. and parasitic capacitance can be reduced. The chip has been fabricated with a 1.2V 0.13um 1-poly 7-metal CMOS technology. The effective chip area including the calibration circuit is 2.5$mm^2$. SNDR is about 39.49dB when the input frequency is 9MHz at 2GHz sampling frequency. The SNDR is improved by 3dB with the calibration circuit.

Evaluation of a Diffusive Sampler for the Measurement of Formaldehyde using Colorimetric Method (흡광광도법을 이용한 포름알데히드 확산측정기의 평가)

  • Yim, Bong-Been;Kim, Sun-Kyu;Jung, Eui-Suk;Kim, Sun-Tae
    • Journal of Korean Society of Environmental Engineers
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    • v.27 no.6
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    • pp.606-613
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    • 2005
  • The badge-type diffusive sampler for the measurement of formaldehyde in indoor air using three types of colorimetric methods such as chromotrophic acid(CTA), 3-methyl-2-benzothiazolinone hydrazone(MBTH), and 4-amino-3-hydrazino-5-mercapto-1,2,4-triazole(AHMT) method. The washing of the collection filter with several cleaning solution was effected with satisfactory results, regardless of the types of cleaning solutions. The concentrations of absorbance solution in each colorimetric method were experimentally determined by considering the sampling rates. The variation blank values in each colorimetric method was below 15%. As compared with CTA and AHMT methods, the reproducibility of MBTH method was excellent and was below 10% relative standard deviation. The collected formaldehyde mass and time-weighted concentration had a good correlation (correlation coefficient > 0.93). The limit of detection and limit of quantitation, and minimum sampling time were closely correlated to the sampling rates for the measurement of formaldehyde in each method.

Design of a Discrete Flux Observer by the Power Series Approximation

  • Kim, Kyung-Seo;Kim, Il-Han
    • Journal of Power Electronics
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    • v.11 no.3
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    • pp.304-310
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    • 2011
  • The power series approximation method is proposed for real time implementations of a discrete flux observer. The proposed method improves the performance of the discrete flux observer in the case of a low sampling rate and high speed range, where the simple discrete flux observer converted by the Euler method cannot estimate the actual flux precisely. The performance of discrete flux observers with different orders of approximation is compared to find out the proper order of approximation. The validity of the proposed method is verified through simulation and experiment.