• Journal of Fashion Business
• /
• v.20 no.4
• /
• pp.153-171
• /
• 2016

With the advent of smart clothing for health care and sports, the sophisticated designs with curved seams are drawing attention. One of the problems in those clothing is to determine the design curves in 2D pattern, such that it corresponds to the lines on the intended 3D body. Moreover, the difficulty increases when the original pattern needs to be changed for various sizes and body types. We compare two methods of pattern enlargement in this paper: one is the offset/projection type, and the other is the split grading type. For the enlarged pattern with offset/projection type, the 3D surface offset was first adopted to transform the standard lower body to the target larger size; next, the design lines were projected to the new 3D surface, following which the 3D pattern was developed from the newly transformed 3D surface. In the second method, the enlarged pant patterns were developed by the split grading method. Here, a 3D pattern was developed from the initial body, and then enlarged to the target size by the conventional split grading method. Two feminine pants patterns were examined by 3D virtual fitting. We observed that the 3D offset/projection pants pattern was well fitted, having an evenly distributed surplus, as compared with the sample developed using the split grading method. The difference between the two patterns were apparent at the location where several curved lines merged.

• Journal of the Society of Naval Architects of Korea
• /
• v.56 no.1
• /
• pp.66-74
• /
• 2019

In the field of shipbuilding design, the use of 3D CAD is becoming commonplace, and most of the large shipyards are conducting 3D design. However at the production site, workers are still working on 2D drawings rather than 3D models. This tendency is even worse in small-scale shipyards and block manufacturing shops. Particularly, in a manufacturing shop that is engaged in the outsourcing of blocks, it may not be possible to provide 3D model. However, the demand for 3D models in the production field is steadily increasing. Therefore, it would be helpful if 3D model could be generated from a 2D drawing. In this paper, we propose a method to extract template and unfolded surface shape information from shell template offset drawing using computer vision technology. Also a 3D surface model was reconstructed and visualized from the extracted information. The result of this study is thought to be helpful in the work environment where 3D model information can not be obtained.

• Journal of Korean Institute of Industrial Engineers
• /
• v.19 no.3
• /
• pp.123-137
• /
• 1993

In this paper, an integrated approach is proposed to generate gouging-free Cartesian tool paths for machining sculptured surfaces from 3D measurement data. The integrated CAD/CAM system consists of two modules : offset surface module an Carteian tool path module. The offset surface module generates an offset surface of an object from its 3D measurement data, using an offsetting method and a surface fitting method. The offsetting is based on the idea that the envelope of an inversed tool generates an offset surface without self-intersection as the center of the inversed tool moves along on the surface of an object. The surface-fitting is the process of constructing a compact representation to model the surface of an object based on a fairly large number of data points. The resulting offset surtace is a composite Bezier surface without self-intersection. When an appropriate tool-approach direction is selected, the tool path module generates the Cartesian tool paths while the deviation of the tool paths from the surface stays within the user-specified tolerance. The tool path module is a two-step process. The first step adaptively subdivides the offset surface into subpatches until the thickness of each subpatch is small enough to satisfy the user-defined tolerance. The second step generates the Cartesian tool paths by calculating the intersection of the slicing planes and the adaptively subdivided subpatches. This tool path generation approach generates the gouging-free Cartesian CL tool paths, and optimizes the cutter movements by minimizing the number of interpolated points.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.4C
• /
• pp.446-452
• /
• 2009

OFDM system has a disadvantage of sensitiveness about the effect of frequency offset caused by the discord of oscillators in the transmitter and receiver. Either, the frequency offsets in mobile radio channels distort the orthogonality between sub-carriers resulting in the inter-carrier interference(ICI). In this paper, we analyze the effect of the ICI and propose a new method using SC technique. To analyze BER(Bit Error Rate) and CIR(Carrier to Interference Ratio) performance of the proposed method. the simulation program MATLAB is used. By the simulation results, SNR performance is improved by this method. In case the frequency offset is 0.3 and 0.5, SNR gains are over 0.5dB and 1dB in the BPSK modulation and 1dB and 2dB in the QPSK modulation at BER of $10^{-3}$ respectively. In addition, CIR performance is improved over 15dB. As a result, the proposed method is more effective to improve the system performance than the conventional method.

• Journal of the Semiconductor & Display Technology
• /
• v.3 no.4
• /
• pp.19-27
• /
• 2004

The characteristic evaluation of A/D converter is to measure the linearity of the converter. The evaluation of the linearity is to measure the DNL, INL, gain error and offset error in the various test parameters of A/D converter. Generally, DNL and INL are to be measured by the Histogram Test Algorithm in the DSP-based ATE environment. And gain error and offset error are to be measured by the calculation equation of the measuring algorithm. It is to propose the new Concurrent Histogram Test Algorithm for the test of the housekeeping A/D converter used in the CDMA cellular phone. Using the proposed method, it is to measure the DNL, INL, gain error and offset error concurrently and to show the measured results.

• Journal of the Korean Society for Precision Engineering
• /
• v.25 no.3
• /
• pp.157-164
• /
• 2008

While developing physical prototype from CAD model, rapid prototyping mainly focuses on two key points reducing time and material consumption. So, we have to change from a traditional solid model to building a hollowed prototype. In this paper, a new method is presented to hollow out solid objects with uniform wall thickness to increase RP efficiency. To achieve uniform wall thickness, it is necessary to generate internal contour by slicing the offset model of an STL model. Due to many difficulties in this method, this paper proposes a new algorithm that computes internal contours computing offset model which is generated from external contour using wall thickness. Proposed method can easily compute the internal contour by slicing the offset surface defined by the sum of circle swept volumes of external contours without actual offset and the circle wept volumes. Internal contour existences are confirmed by using the external point. Presented algorithm uses the 2D geometric algorithm allowing RP implementation more efficient. Various examples have been tested with implementation of the algorithm, and some examples are presented for illustration.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.5 no.4
• /
• pp.653-660
• /
• 2001

In this paper, we designed 2303.15MHz frequency synthesizer for the purpose of the phase noise prediction. For the modeling of phase noise generated in the designed system through introducing the noise-modeling method suggested by Lascari we analyzed a variation of phase noise as according as that of offset frequency. Especially, for the third-order system of the PLL among some kinds of phase noise generated from VCO we analyzed the aspect of 1/f-noise appearing troubles in the low frequency band. Since it is difficult to analyze mathematically 1/f-noise in the third-order system of the PLL, introducing the concept of pseudo-damping factor has made an ease of the access of the 1/f-noise variance. we showed a numerical formula of 1/f-noise variance in the third-order system of the PLL which is compared with that of 1/f-noise variance in the second-order system of the PLL. As a result, In case of txco we found the reduce rapidly along the offset frequency after passed through that phase-noise was -160dBc/Hz before passed through a loop at 10kHz offset frequency and -162.6705dBc/kHz after passed through the loop, -180dBc/Hz at 100kHz offset frequency and -560dBc/kHz after passed through the loop. We can notice that the variance of third-order system more occurs (or the variance of second-order system in connection with noise bandwidth and variance factor of second-order and third-order system.

• Korean Journal of Computational Design and Engineering
• /
• v.9 no.3
• /
• pp.203-211
• /
• 2004

In this paper, we present a method of extracting a regular 2-manifold triangular net from a triangular net including degenerate and self-intersected triangles. This method can be applied to obtaining an offset model without degenerate and self-intersected triangles. Then this offset model can be used to generate CL curves and extract machining features for CAPP The robust and efficient algorithm to detect valid triangles by growing regions from an initial valid triangle is presented. The main advantage of the algorithm is that detection of valid triangles is performed only in valid regions and their adjacent selfintersections, and omitted in the rest regions (invalid regions). This advantage increases robustness of the algorithm. As well as a k-d tree bucketing method is used to detect self-intersections efficiently.

• Journal of information and communication convergence engineering
• /
• v.13 no.3
• /
• pp.189-196
• /
• 2015

In this paper, we present a rotating auto-zeroing offset cancellation technique, which can improve the performance of touch screen sensing circuits. Our target touch screen detection method employs multiple continuous sine waves to achieve a high speed for large touch screens. While conventional auto-zeroing schemes cannot handle such continuous signals properly, the proposed scheme does not suffer from switching noise and provides effective offset cancellation for continuous signals. Experimental results show that the proposed technique improves the signal-to-noise ratio by 14 dB compared to a conventional offset cancellation scheme. For the realistic simulation results, we used Cadence SPECTRE with an accurate TSP model and noise source. We also applied an asymmetric device size (10% MOS size mismatch) to the OP Amp design in order to measure the effectiveness of offset cancellation. We implemented the proposed circuit as part of a touch screen controller system-on-chip by using a Magnachip/SK Hynix 0.18-µm complementary metal-oxide semiconductor (CMOS) process.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.6
• /
• pp.825-831
• /
• 2016

In this paper, a transimpedance amplifier based on a new DC offset cancellation (DCOC) method is proposed for WCDMA/LTE applications. The proposed method applies a sample and hold mechanism to the conventional DCOC method with a DC feedback loop. It prevents the removal of information around the DC, so it avoids signal-to-noise ratio degradation. It also reduces area and power consumption. It was designed in a $0.13{\mu}m$ deep n-well CMOS technology and drew a maximum current of 1.58 mA from a 1.2 V supply voltage. It showed a transimpedance gain of $80dB{\Omega}$, an input-referred noise current lower than 0.9 pA/${\surd}$Hz, an out-of-band input-referred 3rd-order intercept point more than 9.5 dBm, and an output DC offset lower than 10 mV. Its area is $0.46mm{\times}0.48mm$.