• Journal of IKEEE
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• v.26 no.4
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• pp.705-709
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• 2022

The effect of the annealing temperature of the poly(vinylidene fluoride-trifluoroethylene)(P(VDF-TrFE)) solid electrolyte layer on the electrical properties of the P(VDF-TrFE)-based memristor was analyzed. In morphological analyses, the P(VDF-TrFE) thin film with 200℃ annealing temperature (200P(VDF-TrFE)) was shown to have surface roughness ≈5 times larger and thickness ≈20% smaller than that with 100℃ annealing temperature (100P(VDF-TrFE)). Compared to the 100P(VDF-TrFE) memristor (M100), the set voltage of the 200P(VDF-TrFE) memristor (M200) decreased by ≈50% and the magnitude of its reset voltage increased by ≈30%. Moreover, M200 was found to have better memory retention characteristics than M100. These differences were attributed to relatively strong local electric fields inside M200 compared to M100. This study suggests the importance of the annealing temperature in polymer memristors.

• Journal of IKEEE
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• v.27 no.1
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• pp.25-29
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• 2023

Effect of the processes of polysilazane solid electrolyte layer and silver (Ag) active electrode on the electrical characteristics of memristor was investigated. The memristor with the solid electrolyte annealed at higher temperature exhibited the higher set voltage and better memory retention characteristics than that annealed at lower temperature. The increase in the set voltage and the improvement of the memory retention characteristic at high annealing temperature were attributed to a reduction in the void density and an increase in the void uniformity inside the solid electrolyte, respectively. In the case where the polysilazane solution's concentration is high, the memristor exhibited rapid degradation of low resistive state even annealed at high temperature. Lastly, it was shown that the memristor with the solution-processed Ag active electrode showed WORM property unlike that with the vacuum-processed Ag active electrode. The WORM property was possibly due to morphological defects present in the solution-processed Ag active electrode.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.39 no.9
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• pp.937-945
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• 2015

In this paper, we study the coating performance according to the slot-die conditions in the coating process. The quality of the slot-die coating depends on factors such as feeding speed of film, the viscosity of liquid, and the pressure applied to the slot-die. In this study, we determine the optimum conditions for a stable coating by performing 2-D and 3-D simulations. We carry out numerical simulations with respect to the feeding velocity of the film, the pressure of the slot-die inlet, and the viscosity of the coating liquid. Based on the results, the coating was the most reliable when the pressure of the inlet was $5kgf/cm^2$, the viscosity was about 100 cps and the velocity was 20 m/min.

• Transactions of Materials Processing
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• v.28 no.2
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• pp.63-70
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• 2019

This study investigates the effects of multi-axial diagonal forging (MADF) processing number on the microstructures of AA1100 fabricated using MADF processes. The cast AA1100 was annealed at $400^{\circ}C$ for 3hrs in $N_2$ atmosphere and cut into $25mm^3$ cubes for the MADF processes. The MADF process consist of plane forging with a thickness reduction of 30% and a diagonal forging with a diagonal forging angle of 135 degrees. In order to analyze the microstructural variations based on the number of repetitions, 1, 2, 3 and 4 cycles of the MADF process were performed. AA1100 specimens were successfully deformed without cracking of the surface for up to 4 cycles of MADF. The grain size, average misorientation and average grain orientation spread (GOS) of MADF processed materials were analyzed using EBSD technique. The results showed that MADF process effectively refined the microstructure of AA1100 with an initial average grain size of $337.4{\mu}m$. The average grain sizes of specimens which were MADF processed for 2, 3, 4 cycles were refined to be $1.9{\mu}m$, $1.6{\mu}m$, $1.4{\mu}m$, respectively. The grain refinement appeared saturated when AA1100 got MADF processed over 2 cycles. When the specimen was subjected to two or more cycles of MADF, the degree of decrease in the average grain size drastically decreased with an increase in the number of cycle due to the softening phenomena such as dynamic recovery or dynamic recrystallization during processing.

• Transactions of Materials Processing
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• v.27 no.6
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• pp.347-355
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• 2018

This study investigated the effects of the processing number of multi-axial diagonal forging (MADF) on the microstructural changes of OFC fabricated by MADF processes. The as-extruded OFC was cut to $25mm^3$ cube for the MADF processes. The MADF process consists of plane forging with a thickness reduction of 30% and diagonal forging with a diagonal forging angle of $135^{\circ}$. In order to analyze the microstructural evolutions according to the number of repetitions, 1, 2, 3 and 4 cycles of the MADF process were performed. OFC specimens were successfully deformed without surface cracking for up to 4 cycles of MADF. The grain size, average misorientation and average grain orientation spread (GOS) of MADF processed materials were analyzed using EBSD technique and their Vicker's hardness were also measured. The results showed that MADF process effectively refined the microstructure of OFC with initial average grain size of $84.2{\mu}m$. The average grain sizes of specimens MADF processed for 1, 2, 3, 4 cycles were refined to be $8.5{\mu}m$, $2.2{\mu}m$, $1.5{\mu}m$, $1.1{\mu}m$, respectively. The grain refinement seemed to be saturated when OFC was MADF processed over 2 cycles. In the case of specimens subjected to two or more cycles of MADF, the degree of decrease in average grain size was drastically reduced as the number of cycles increased due to softening phenomena such as dynamic recovery or dynamic recrystallization during processing. The degree of increase in average Vicker's hardness was also dramatically reduced as the number of cycles increased due to the same reason.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.10
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• pp.1031-1041
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• 2009

A small microstrip monopole antenna for macro-micro frequency tuning over multiple bands is presented. The meander-shape antenna is fabricated on a conventional printed circuit board(FR-4, $\varepsilon_r=4.4$ and tan $\delta=0.02$). The antenna operates over WiBro(2.3~2.4 GHz) and WLAN a/b(2.4~2.5 GHz/5.15~5.35 GHz) service bands with an essentially constant antenna gain within each service band. Two diodes, a PIN diode and a varactor, are embedded into the antenna for frequency reconfiguration. The PIN diode is used for frequency switching(macro-tuning) between 2 GHz and 5 GHz bands while the varactor is used for frequency tuning(micro-tuning) within the service bands, 2.3~2.5 GHz and 5.15~5.35 GHz. Unwanted resonances between the two frequency bands(2 GHz and 5 GHz) are suppressed by filling up the gaps between the meander lines. The antenna gain is essentially constant and higher than 2 dBi within each service band. The measured performance of the proposed antenna system suggests the macro-micro frequency tuning techniques be useful in reconfigurable wireless communication systems.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.12
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• pp.1828-1835
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• 2012

In this paper, a conceptual design and a detailed design of novel cylindrical magnetic levitation stage is introduced. This is came from planar-typed magnetic levitation stage. The proposed stage is composed of cylinder-typed permanent magnet array and semi-cylinder-typed 3 phase winding module. When a proper current is induced at winding module, a magnetic levitation force between the permanent magnet array and winding module is generated. The proposed stage can precisely move the cylinder to rotations and translations as well as levitations with the magnetic levitation force. This advantage is useful to make a nano patterning on the surface of cylindrical specimen by using electron beam lithography under vacuum. Two methods are used to calculate required magnetic levitation forces. The one is 2D FEM analysis, the other is mathematical modeling. This paper shown that results of two methods are similar. An assistant plate is introduced to reduce required currents of winding module for levitations in vacuum. The mathematical model of cylindrical magnetic levitation stage is used for dynamic simulation of magnetic levitations. A lead-lag compensator is used for control of the model. Simulation results shown that the detail designed model of the cylindrical magnetic levitation stage with the assistant plate can be controlled very well.

• Current Optics and Photonics
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• v.6 no.2
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• pp.202-211
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• 2022

In the pasteurization of escalator handrails using ultraviolet (UV) sterilizers, a combination of light distribution and escalator speed has priority over other important factors. Furthermore, since part of the escalator handrail has a curved structure, proper design is needed to improve the sterilization rate on the surfaces touched by users. In this paper, two types of sterilizers satisfying these conditions are manufactured with 275-nm UV-C LEDs, after modeling the three-dimensional (3D) structure of an escalator handrail and simulating optical distributions of UV-C irradiation on the handrail's surface according to light-emitting diode (LED) positions and reflector variations in the sterilizers. Pasteurization experiments with the UV-C LED sterilizers are conducted on six types of gram-positive and gram-negative bacteria, with exposure times of 0.2, 5, and 15 s at an actual installation distance of 20 mm. The sterilization rates for the gram-positive bacteria are 10.63% to 27.94% at 0.2 s, 89.44% to 96.30% at 5 s, and 99.64% to 99.88% at 15 s. Those for the gram-negative bacteria are 57.70% to 77.63% at 0.2 s, 98.90% to 99.49% at 5 s, and 99.88% to 99.99% at 15 s. The power consumption of the UV-C LED sterilizer is about 8 W, which can be supplied by a self-generation module instead of an external power supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.9
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• pp.14-23
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• 2010

This paper reports the fabrication of a DVB-T/H System in Package (SiP) that is able to receive and process the DVB-T/H signal. The DVB-T/H is the European telecommunication standard for Digital Video Broadcasting (DVB). An IC-embedded Printed Circuit Board (PCB) process, interpose a chip between PCB layers, has applied to the DVB-T/H SiP. The chip inserted in DVB-T/H SiP is the System on Chip (SoC) for mobile TV. It is comprised of a RF block for DVB-T/H RF signal and a digital block to convert received signal to digital signal for an application processor. To operate the DVB-T/H IC, a 3MHz DC-DC converter and LDO are on the DVB-T/H SiP. And a 38.4MHz crystal is used as a clock source. The fabricated DVB-T/H SiP form 4 layers which size is $8mm{\times}8mm$. The DVB-T/H IC is located between 2nd and 3rd layer. According to the result of simulation, the RF signal sensitivity is improved since the layout modification of the ground plane and via. And we confirmed the adjustment of LC value on power transmission is necessary to turn down the noise level in a SiP. Although the size of a DVB-T/H SiP is decreased over 70% than reference module, the power consumption and efficiency is on a par with reference module. The average power consumption is 297mW and the efficiency is 87%. But, the RF signal sensitivity is declined by average 3.8dB. This is caused by the decrease of the RF signal sensitivity which is 2.8dB, because of the noise from the DC-DC converter.