• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.88-93
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• 2003

무전해 Ni-P와 Sn의 반응 및 Ni-P의 결정화에 대한 P 함량의 영향을 세 가지 다른 조성의 Ni-P (P 4.6, 9, 13 $wt.\%$)를 이용하여 연구하였다. $300^{\circ}C$까지 열처리한 모든 시편에서 $Ni_3Sn_4$ intermetallic compound (IMC)가 생성되었고 이들 시편을 $450^{\circ}C$까지 열처리한 경우 Sn 두께가 $0.5{\mu}m$로 작을 때 $Ni_3Sn_4$가 모두 $Ni_3Sn_2$로 변화하였다. nanocrystal인 Ni-4.6P는 Ni (111) texture를 유지하며 결정화되었고 Sn과의 반응시 형성되는 $Ni_3Sn_4$ IMC 또한 비정질인 Ni-9P, Ni-13P 경우보다 강한 (111) texture를 가짐이 확인되었다. Ni-P 막의 P 함량이 작은 경우 $Ni_3Sn_4$ IMC는 두껍고 조밀하게 형성되는 반면 P-rich layer 두께는 작아졌다.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.3 s.36
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• pp.197-205
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• 2005

Development of the packaging is one of the critical issues for commercialization of the RF-MEMS devices. RF MEMS package should be designed to have small size, hermetic protection, good RF performance and high reliability. In addition, packaging should be conducted at sufficiently low temperature. In this paper, a low temperature hermetic wafer level packaging scheme for the RF-MEMS devices is presented. For hermetic sealing, Au-Sn eutectic bonding technology at the temperature below $300{\times}C$ is used. Au-Sn multilayer metallization with a square loop of $70{\mu}m$ in width is performed. The electrical feed-through is achieved by the vertical through-hole via filled with electroplated Cu. The size of the MEMS Package is $1mm\times1mm\times700{\mu}m$. By applying $O_2$ plasma ashing and fabrication process optimization, we can achieve the void-free structure within the bonding interface as well as via hole. The shear strength and hermeticity of the package satisfy the requirements of MIL-STD-883F. Any organic gases or contamination are not observed inside the package. The total insertion loss for the packaging is 0.075 dB at 2 GHz. Furthermore, the robustness of the package is demonstrated by observing no performance degradation and physical damage of the package after several reliability tests.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.37-42
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• 2007

Copper deposition studies have been actively studied since interests on 3D SiP were increased. The defects inside via can be easily formed due to the current density differences on entrance, bottom and wall of via. So far many different additives and current types were discussed and optimized to obtain void-free copper via filling. In this research acid cupric sulfate plating bath containing additives such as PEG, SPS, JGB, PEI and wave current applied electroplating were examined. The size and shape of grain were influenced by the types of organic additives. The cross section of specimen were analyzed by FESEM. When PEI was added, the denser copper deposits were obtained. Electroplaing time was reduced when 2 step via filling was employed.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.3
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• pp.1-6
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• 2014

The demand for fine-pitch devices is increasing due to an increase in I/O pin count, a reduction in power consumption, and a miniaturization of chip and package. In addition non-scalability of Cu pillar/Sn cap or Pb-free solder structure for fine-pitch interconnection leads to the development of bumpless interconnection system. Few bumpless interconnect systems such as BBUL technology, SAB technology, SAM technology, Cu-toCu thermocompression technology, and WOW's bumpless technology using an adhesive have been reviewed in this paper: The key requirements for Cu bumpless technology are the planarization, contamination-free surface, and surface activation.

• KOREAN JOURNAL OF PACKAGING SCIENCE & TECHNOLOGY
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• v.23 no.3
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• pp.163-171
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• 2017

Effects of different packaging methods for maintaining the shelf life and postharvest quality of iceberg lettuce (Lactuca sativa L.) were studied after harvesting in summer season. Lettuce heads were packaged in plastic crate with or without different films such as (A) Individual lettuce head sealed packaging with linear low density polyethylene (LLDPE) film; (B) Packaging lettuce head in plastic crate and wrapped with LLDPE film; (C): Individual lettuce head sealed packaging with perforated high density polyethylene (HDPE) film; (D) Packaging lettuce head in plastic crate and wrapped with perforated HDPE; and (E) Packaging lettuce head in plastic crate without any film (control), and stored at $2^{\circ}C$ for 35 days. Several quality parameters such as fresh weight loss, SPAD (soil & plant analyzer development) meter value, respiration rate, moisture content and appearance of lettuce were investigated. The lettuce wrapped with individually-sealed LLDPE film showed the lowest weight loss and the highest SPAD value rendering the best appearance index among the treataments throughout the three-week storage period at $2^{\circ}C$. Extending the freshness of iceberg lettuce during low temperature storage will definitely increase the salability potential in the domestic market even during summer season.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.2
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• pp.63-67
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• 2008

3D integration technology has been a major focus of the next generation of IC industries. In this study Si wafer ultra-thinning has been investigated especially for the effect of ultra-thinning on the silicon surface. Wafers were grinded down to $30{\mu}m\;or\;50{\mu}m$ thickness and then grinded only samples were compared with surface treated samples in terms of surface roughness, surface damages, and hardness. Dry polishing or wet etching treatment has been applied as a surface treatment. Surface treated samples definitely showed much less surface damages and better roughness. However, ultra-thinned Si samples have the almost same hardness as a bulk Si wafer.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.19-22
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• 2013

Recently, high speed transmission and large information demand have been increased. Also, researches of integrated optical device for large production and high-efficient planar lightwave circuit (PLC) have been increased. In this paper, integrated optical alignment is proposed which makes passive alignment between optical device and optical fiber possible. The integrated optical device consists of splitter structures which have one input and two outputs. The proposed integrated structure was fabricated by roll-to-roll (RTR) processing method. This method enables to manufacture continuously and the processing time can be shortened. Optical property of the fabricated optical device showed 3.9 dB insertion loss and 0.2 dB optical uniformity using the light source with 1550 nm wavelength.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.91-95
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• 2017

Package-On-Package (PoP) technology is developing toward smaller form factors with high-speed data transfer capabilities to cope with high DDR4x memory capacity. The common application processor (AP) used for PoP devices in smartphones has the bottom package as logic and the top package as memory, which requires both thermally and electrically enhanced functions. Therefore, it is imperative that PoP designs consider both thermal and power distribution network (PDN) issues. Stacked packages have poorer thermal dissipation than single packages. Since the bottom package usually has higher power consumption than the top package, the bottom package impacts the thermal budget of the top package (memory). This paper investigates the thermal and electrical characteristics of PoP designs, particularly the bottom package. Findings include that via and dense via-cluster volume have an important role to lower thermal resistance to the motherboard, which can be an effective way to manage chip hot spots and reduce the thermal impact on the memory package. A Cu block and dense via-cluster layout with an optimal location are proposed to drain the heat from the chip hot spots to motherboard which will enhance thermal and electrical performance at the design stage. The analytical thermal results can be used for design guidelines in 3D packaging.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 1999.11a
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• pp.111-115
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• 1999

The $Li_2O-MgO-MgF_2-SiO_2$glasses with addition of $B_2O_3$ were investigated in order to make glass-ceramics for low temperature firing substrate. Glasses were made by melting at $1450^{\circ}C$ in the electronic furnace and crystallized at $750^{\circ}C$. After the crystallization, crystal phases and microstructure were observed. The crystal phases were polycrystalline of lithium boron fluorphlogopite and lithium fluorhectorite. The crystal shape was changed to grande type from needle type with the increase in $B_2O_3$ contents. Average particle size of the glass-ceramics aftar water swelling was $3.77{\mu}{\textrm}{m}$. The optimum sintering temperature and sintering shrinkage of the substrate were $900^{\circ}C$ and 13.4vol%, respectively.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2012.10a
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• pp.467-468
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• 2012