• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.609-610
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• 2008

In this paper, a 110 dB, 1.024 MHz fourth-order single-loop Delta-Sigma sigma modulator has been presented with an over-sampling ratio of 128 and an overload factor of -6 dB for a bandwidth of 4 kHz. In particular, this ${\Sigma}-{\Delta}$ modulator is well suited for high accuracy measure systems. The whole modulator consumes only 3-mW from a single 3.3V supply in a $0.35-{\mu}m$ CMOS technology.

• Current Optics and Photonics
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• v.7 no.1
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• pp.73-82
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• 2023

In this study, we demonstrate ultrahigh-resolution spectral-domain optical coherence tomography with a 200-kHz line rate using a superluminescent diode with a -3-dB bandwidth of 100 nm at 849 nm. To increase the line rate, a subset of the total number of camera pixels is used. In addition, a partial-spectrum detection method is used to obtain OCT images within an imaging depth of 2.1 mm while maintaining ultrahigh axial resolution. The partially detected spectrum has a flat-topped intensity profile, and side lobes occur after fast Fourier transformation. Consequently, we propose and apply the super-Gaussian window function as a new window function, to reduce the side lobes and obtain a result that is close to that of the axial-resolution condition with no window function applied. Upon application of the super-Gaussian window function, the result is close to the ultrahigh axial resolution of 4.2 ㎛ in air, corresponding to 3.1 ㎛ in tissue (n = 1.35).

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.3
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• pp.49-57
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• 2000

In this paper, lumped-element isolator is analyzed and designed using the scattering matrix approach. Using the designed parameters, compact isolator with 7.0x7.0x2.3 mm$^3$ dimensions is fabricated and tested in 1.765GHz PCS phone band. Implemented isolator shows 29.95dB isolation characteristic at center frequency and has 0.35dB insertion loss in overall 30MHz operating bandwidth. Return losses of input and output port are measured below -19 dB. Experimental results show that the implemented isolator has better performances than the conventional one.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.22-26
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• 2012

This paper introduces a 2.5-Gb/s optical receiver implemented in a standard 1P4M 0.18um CMOS technology for the applications of active optical HDMI cables. The optical receiver consists of a differential transimpedance amplifier(TIA), a five-stage differential limiting amplifier(LA), and an output buffer. The TIA exploits the inverter input configuration with a resistive feedback for low noise and power consumption. It is cascaded by an additional differential amplifier and a DC-balanced buffer to facilitate the following LA design. The LA consists of five gain cells, an output buffer, and an offset cancellation circuit. The proposed optical receiver demonstrates $91dB{\Omega}$ transimpedance gain, 1.55 GHz bandwidth even with the large photodiode capacitance of 320 fF, 16 pA/sqrt(Hz) average noise current spectral density within the bandwidth (corresponding to the optical sensitivity of -21.6 dBm for $10^{-12}$ BER), and 40 mW power dissipation from a single 1.8-V supply. Test chips occupy the area of $1.35{\times}2.46mm^2$ including pads. The optically measured eye-diagrams confirms wide and clear eye-openings for 2.5-Gb/s operations.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.4
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• pp.319-324
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• 2011

This paper dealt with a partial discharge (PD) detection method for insulation diagnosis in cast-resin transformers. To detect PD pulse, a planar-capacitive probe was designed and fabricated. The probe has no insulation problem and can be installed on cast-resin transformers even in operation since it does not connect with high voltage conductor. The PD measurement system consists of the capacitive probe, a coupling network of 100 [kHz] low-cutoff frequency, and an amplifier with a gain of 40 [dB] and a frequency bandwidth of 500 [Hz]~45 [MHz]. A plane-needle and a plane-plane electrode system were fabricated to simulate insulation defects in a cast-resin transformer. Sensitivity of the PD measurement system, which is evaluated by a standard calibrator was 0.35 [mV/pC] for positive and 0.45 [mV/pC] for negative, respectively. The PD detection by the capacitive probe was less sensitive than that by a coupling capacitor according to IEC 60270, but we could analyze the magnitude and the phase distribution of PD pulse.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.371-374
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• 2005

This paper presents the design and fabrication of a cost effective and broad band 8$\times$8 stacked patch array antenna which are backed by a metal cavity operating at 400Hz based on 4 layers LTCC technology. Gain of antenna can be enhanced by using a metal cavity, which can be easily implemented by using LTCC substrates and vias. The broadband performance can be obtained by varying the dimension of patch and the number of layers. Furthermore, to keep the feeding network as smal1 as possible and reduce radiation from feeding network a mirrored patch orientation and embedded micro strip line are adopted, The fabricated antenna is $40\times45\times0.4$ $mm^3$in size. It shows gain 20.4dBi, beam width 10.7deg and impedance bandwidth of l0dE return loss 3.35GHz (40.9$\sim$44.25 GHz), which is about 8% of a center frequency.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.4
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• pp.353-358
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• 2022

Bulky iron-core potential transformers (PT) are installed in a tank of gas insulated switchgears (GIS) for a system voltage measurement in power substations. In this paper, we studied an electronic voltage transformer (EVT) embedded in a spacer for miniaturization, eco-friendliness, and performance improvement of GIS. The prototype EVT consists of a capacitive probe (CP) that can be embedded in a spacer and a voltage Follower with a high input and a low output impedance. The CP was fabricated in the form of a Flexible-PCB to acquire the insulation performance and to withstand vibration and shock during operation. Voltage ratio of the prototype EVT is about 42,270, and the frequency bandwidth of -3 dB ranges from 0.33 Hz to 3.9 MHz. The voltage ratio error evaluated at about 6%, 12% and 18% of the rated voltage of 170 kV was 0.32%, and the phase error was 12.9 minutes. These results were within the accuracy for the class 0.5 specified in IEC 60044-7 and satisfy even in ranges from 80% to 120% of the rated voltage. If the prototype EVT replaces the conventional iron-core potential transformer, it is expected that the height of the GIS could be reduced by 11% and the amount of SF₆ will be reduced by at least 10%.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.2
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• pp.27-35
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• 2016

A Low jitter dual output frequency synthesizer for smart audio devices is described in this paper. It has been fabricated in a 1.8 V Dongbu $0.18-{\mu}m$ CMOS process. Output frequency is controlled by 3 rd order Sigma-Delta Modulation and digital divider. The frequency synthesizer has a size of $0.6mm^2$, frequency range of 0.6-200 MHz, loop bandwidth of 350 kHz, and rms jitter of 11.4 ps-21.6 ps.

• Journal of electromagnetic engineering and science
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• v.14 no.2
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• pp.61-67
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• 2014

This paper presents a zero-IF CMOS RF receiver, which supports three channel bandwidths of 5/10/40MHz for LTE-Advanced systems. The receiver operates at IMT-band of 2,500 to 2,690MHz. The simulated noise figure of the overall receiver is 1.6 dB at 7MHz (7.5 dB at 7.5 kHz). The receiver is composed of two parts: an RF front-end and a baseband circuit. In the RF front-end, a RF input signal is amplified by a low noise amplifier and $G_m$ with configurable gain steps (41/35/29/23 dB) with optimized noise and linearity performances for a wide dynamic range. The proposed baseband circuit provides a -1 dB cutoff frequency of up to 40MHz using a proposed wideband OP-amp, which has a phase margin of $77^{\circ}$ and an unit-gain bandwidth of 2.04 GHz. The proposed zero-IF CMOS RF receiver has been implemented in $0.13-{\mu}m$ CMOS technology and consumes 116 (for high gain mode)/106 (for low gain mode) mA from a 1.2 V supply voltage. The measurement of a fabricated chip for a 10-MHz 3G LTE input signal with 16-QAM shows more than 8.3 dB of minimum signal-to-noise ratio, while receiving the input channel power from -88 to -12 dBm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.58-67
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• 2009

This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within $10{\mu}s$. It is implemented in a $0.18{\mu}m$ CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8 nV/$\sqrt{Hz}$ input referred noise, and 5-dBm $IIP_3$ at 60-mW power consumption. The power detector shows the 35dB dynamic range for 100 MHz input.