• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.65 no.10
• /
• pp.1655-1663
• /
• 2016

Recently the researches on Modular Multi-level Converter (MMC) are being highlighted because high quality and efficient power transmission are key issues in the High Voltage Direct Current (HVDC) transmission system. This paper proposes an improved pre-charging method for the sub-module capacitors in MMC that operates in Nearest Level Control (NLC) modulation. The proposed method does not require additional circuits or Pulse Width Modulation (PWM) techniques. The feasibility of proposed method was verified through computer simulations for a scaled 3-phase 10kVA MMC with 12 sub-modules per each arm. Hardware experiments with a scaled prototype were performed in the lab to confirm the simulation results.

• Journal of Electrical Engineering and Technology
• /
• v.13 no.6
• /
• pp.2441-2446
• /
• 2018

This paper presents a radio frequency-to-direct current (RF-to-DC) converter for special RF power harvesting application at 915 MHz. The major featured components of the proposed RF-to-DC converter is the combination of a cross-coupled rectifier and an active diode: first, the cross-coupled rectifier boosts the input voltage to desired level, and an active diode blocks the reverse current, respectively. A prototype was implemented using $0.18{\mu}m$ CMOS technology, and the performance was proven from the fact that the targeted RF harvesting system's full-operation with higher power efficiency; even if the system's input power gets lower (e.g., from nominal 0 to min. -12 dBm), the proposed RF-to-DC converter constantly provides 1.47 V, which is exactly the voltage level to drive follow up system components like DC-to-DC converter and so on. And, maximum power conversion efficiency is 82 % calculated from the 0 dBm input power, 2.3 mA load current.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.10
• /
• pp.231-238
• /
• 2013

This paper describes a DC-DC converter IC for Flat Panel Displays. In case of operate LCD devices various type of DC supply voltage is needed. This device can convert DC voltage from 6~14[V] single supply to -5[V], 15[V], 23[V], and 3.3[V] DC supplies. In order to meet current and voltage specification considered different type of DC-DC converter circuits. In this work a negative charge pump DC-DC converter(-5V), a positive charge pump DC-DC converter(15V), a switching Type Boost DC-DC converter(23V) and a buck DC-DC converter(3.3V). And a oscillator, a thermal shut down circuit, level shift circuits, a bandgap reference circuits are designed. This device has been designed in a 0.35[${\mu}m$] triple-well, double poly, double metal 30[V] CMOS process. The designed circuit is simulated and this one chip product could be applicable for flat panel displays.

• Journal of Electrical Engineering and Technology
• /
• v.10 no.1
• /
• pp.165-175
• /
• 2015

Energy storage system has been widely applied in power distribution sectors as well as in renewable energy sources to ensure uninterruptible power supply. This paper presents a model predictive algorithm to control a bidirectional AC-DC converter, which is used in an energy storage system for power transferring between the three-phase AC voltage supply and energy storage devices. This model predictive control (MPC) algorithm utilizes the discrete behavior of the converter and predicts the future variables of the system by defining cost functions for all possible switching states. Subsequently, the switching state that corresponds to the minimum cost function is selected for the next sampling period for firing the switches of the AC-DC converter. The proposed model predictive control scheme of the AC-DC converter allows bidirectional power flow with instantaneous mode change capability and fast dynamic response. The performance of the MPC controlled bidirectional AC-DC converter is simulated with MATLAB/Simulink(R) and further verified with 3.0kW experimental prototypes. Both the simulation and experimental results show that, the AC-DC converter is operated with unity power factor, acceptable THD (3.3% during rectifier mode and 3.5% during inverter mode) level of AC current and very low DC voltage ripple. Moreover, an efficiency comparison is performed between the proposed MPC and conventional VOC-based PWM controller of the bidirectional AC-DC converter which ensures the effectiveness of MPC controller.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.51 no.3
• /
• pp.120-125
• /
• 2002

The switching-mode power converter has been widely used because of its features of high efficiency and small weight and size. These features are brought by the ON-OFF operation of semiconductor switching devices. However, this switching operation causes the surge and EMI(Electromagnetic Interference) which deteriorate the reliability of the converter themselves and entire electronic systems. This problem on the surge and noise is one of the most serious difficulties in AC-to-DC converter. In the switching-mode power converter, the output voltage is generally controlled by varying the duty ratio of main switch. When a converter operates in steady state, duty ratio of the converter is kept constant. So the power of switching noise is concentrated in specific frequencies. Generally, to reduce the EMI and improve the immunity of converter system, the switching frequency of converter needs to be properly modulated during a rectified line period instead of being kept constant. Random Pulse Width Modulation (RPWM) is performed by adding a random perturbation to switching instant while output-voltage regulation of converter is performed. RPWM method for reducing conducted EMI in single switch three phase discontinuous conduction mode boost converter is presented. The more white noise is injected, the more conducted EMI is reduced. But output-voltage is not sufficiently regulated. This is the reason why carrier frequency selection topology is proposed. In the case of carrier frequency selection, output-voltage of steady state and transient state is fully regulated. A RPWM control method was proposed in order to smooth the switching noise spectrum and reduce it's level. Experimental results are verified by converter operating at 300V/1kW with 5%~30% white noise input. Spectrum analysis is performed on the Phase current and the CM noise voltage. The former is measured with Current Probe and the latter is achieved with LISN, which are connected to the spectrum analyzer respectively.

• Journal of Power Electronics
• /
• v.14 no.3
• /
• pp.519-530
• /
• 2014

A novel simplified pulse width modulation(PWM) strategy for neutral point clamped (NPC) three-level converter is proposed in this paper.The direct output voltage modulation is applied to reduce the calculation time. Based on this strategy, several optimized control methods are proposed. The neutral point potential balancing algorithm is discussed and a fine neutral point potential balancing scheme is introduced. Moreover, the minimum pulse width compensation and switching losses reduction can be easily achieved using this modulation strategy. This strategy also gains good results even with the unequal DC link capacitor. The modulation principle is studied in detail and the validity of this simplified PWM strategy is experimentally verified in this paper. The experiment results indicated that the proposed PWM strategy has excellent performance, and the neutral point potential can be balanced well with unequal DC link captaincies.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.5 no.4
• /
• pp.746-755
• /
• 2001

This paper proposes a snubber circuit for flying capacitor 3-level inverter and converter. The proposed snubber circuit makes use of Undeland snubber as basic snubber unit. It has such an advantage of Undeland snubber used in the two-level inverter. Compared with conventional RLD/RCD snubber for 3-level inverter and converter, the proposed snubber keeps such good features as fewer number of components, reduction of voltage stress of main switching devices due to low overvoltage, and improved efficiency of system due to low snubber loss. In this paper, the proposed snubber is applied to multilevel flying capacitor inverter and its feature is demonstrated by computer simulation and experimental result.

• Journal of IKEEE
• /
• v.7 no.2 s.13
• /
• pp.135-143
• /
• 2003

This paper describes the design techniques of the data converters for Multiple-Valued Logic(MVL). A 3.3V low power 4 digit CMOS analog to quaternary converter (AQC) and quaternary to analog converter (QAC) mainly designed with the neuron MOS down literal circuit block has been introduced. The neuron MOS down literal architecture allows the designed AQC and QAC to accept analog and 4 level voltage inputs, and enables the proposed circuits to have the multi-threshold properity. Low power consumption of the AQC and QAC are achieved by utilizing the proposed architecture.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.6 no.3
• /
• pp.135-140
• /
• 2013

In this paper, novel PWM generation method for cascaded H-bridge PWM converter is proposed. The proposed method can solve the unvalancing problem between H-bridges which consist cascade PWM converter without any injection of redundancy switching pattern for solving the load of switches forced from voltage reference of controller.

• Proceedings of the IEEK Conference
• /
• 2002.06e
• /
• pp.207-210
• /
• 2002

This paper describes a design of multiple-mode single-output DC/DC converter which can be used in both up and down conversion. Proposed up/down converter does not produce a negative voltage which is generated in conventional buck-boost type converter. Three types of operation mode(up/down/bypass) are controlled by the input voltage sense and command signals of target output voltage. PFM(pulse frequency modulation) control is adopted and modified for fast tracking and for precise output voltage level with an aid of output voltage sense. Designed DC/DC converter has the performance of less than 5 % ripple and higher than 80 % efficiency. Chip area is 3.50 mm ${\times}$ 2.05 mm with standard 0.35 $\mu\textrm{m}$ CMOS technology.