• Title/Summary/Keyword: 2D Offset

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Extracting a Regular Triangular Net for Offsetting (옵셋팅을 위한 정규 삼각망 추출)

  • Jung W.H.;Jeong C.S.;Shin H.Y.;Choi B.K.
    • Korean Journal of Computational Design and Engineering
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    • v.9 no.3
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    • pp.203-211
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    • 2004
  • In this paper, we present a method of extracting a regular 2-manifold triangular net from a triangular net including degenerate and self-intersected triangles. This method can be applied to obtaining an offset model without degenerate and self-intersected triangles. Then this offset model can be used to generate CL curves and extract machining features for CAPP The robust and efficient algorithm to detect valid triangles by growing regions from an initial valid triangle is presented. The main advantage of the algorithm is that detection of valid triangles is performed only in valid regions and their adjacent selfintersections, and omitted in the rest regions (invalid regions). This advantage increases robustness of the algorithm. As well as a k-d tree bucketing method is used to detect self-intersections efficiently.

Design Issues of CMOS VCO for RF Transceivers

  • Ryu, Seong-Han
    • Journal of electromagnetic engineering and science
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    • v.9 no.1
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    • pp.25-31
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    • 2009
  • This paper describes CMOS VCO circuit design procedures and techniques for multi-band/multi-standard RF transceivers. The proposed techniques enable a 4 GHz CMOS VCO to satisfy all requirements for Quad-band GSMIEDGE and WCDMA standards by achieving a good trade-off among important specifications, phase noise, power consumption, modulation performance, and chip area efficiency. To meet the very stringent GSM T/Rx phase noise and wide frequency range specifications, the VCO utilizes bond-wire inductors with high-quality factor, an 8-bit coarse tune capbank for low VCO gain(30$\sim$50 MHz/V) and an on-chip $2^{nd}$ harmonic noise filter. The proposed VCO is implemented in $0.13{\mu}m$ CMOS technology. The measured tuning range is about 34 %(3.17 to 4.49 GHz). The VCO exhibits a phase noise of -123 dBc/Hz at 400 kHz offset and -145 dBc/Hz at 3 MHz offset from a 900 MHz carrier after LO chain. The calculated figure of merit(FOM) is -183.5 dBc/Hz at 3 MHz offset. This fully integrated VCO occupies $0.45{\times}0.9\;mm^2$.

Analysis and Compensation of Current Measurement Errors in a Doubly Fed Induction Generator

  • Son, Yung-Deug;Im, Won-Sang;Park, Han-Seok;Kim, Jang-Mok
    • Journal of Electrical Engineering and Technology
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    • v.9 no.2
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    • pp.532-540
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    • 2014
  • It is necessary to measure the current of rotor for controlling the active and reactive power generated by the stator side of the doubly fed induction generator (DFIG) system. There are offset and scaling errors in the current measurement. The offset and scaling errors cause one and two times current ripples of slip frequency in the synchronous reference frame of vector control, respectively. This paper proposes a compensation method to reduce their ripples. The stator current is variable according to the wind force but the rotor current is almost constant. Therefore input of the rotor current is more useful for a compensation method. The proposed method adopts the synchronous d-axis current of the rotor as the input signal for compensation. The ripples of the measurement errors can be calculated by integrating the synchronous d-axis stator current. The calculated errors are added to the reference current of rotor as input of the current regulator, then the ripples are reduced. Experimental results show the effectiveness of the proposed method.

Design of a Low-Power CMOS Fractional-N Frequency Synthesizer for 2.4GHz ISM Band Applications (2.4GHz ISM 대역 응용을 위한 저전력 CMOS Fractional-N 주파수합성기 설계)

  • Oh, Kun-Chang;Kim, Kyung-Hwan;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.6
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    • pp.60-67
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    • 2008
  • A low-power 2.4GHz fractional-N frequency synthesizer has been designed for 2.4GHz ISM band applications such as Bluetooth, Zigbee, and WLAN. To achieve low-power characteristic, the design has been focused on the power optimization of power-hungry blocks such as VCO, prescaler, and ${\Sigma}-{\Delta}$ modulator. An NP-core type VCO is adopted to optimize both phase noise and power consumption. Dynamic D-F/Fs with no static DC current are employed in designing the low-power prescaler circuit. The ${\Sigma}-{\Delta}$ modulator is designed using a modulus mapping circuit for reducing hardware complexity and power consumption. The designed frequency synthesizer which was fabricated using a $0.18{\mu}m$ CMOS process consumes 7.9mA from a single 1.8V supply voltage. The experimental results show that a phase noise of -118dBc/Hz at 1MHz offset, the reference spur of -70dBc at 25MHz offset, and the channel switching time of $15{\mu}s$ over 25MHz transition have been achieved. The designed chip occupies an area of $1.16mm^2$ including pads where the core area is only $0.64mm^2$.

A 5-GHz Band CCNF VCO Having Phase Noise of -87 dBc/Hz at 10 kHz Offset

  • Lee, Ja-Yol;Lee, Sang-Heung;Kang, Jin-Young;Kim, Bo-Woo;Oh, Seung-Hyeub
    • Journal of electromagnetic engineering and science
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    • v.4 no.3
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    • pp.137-142
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    • 2004
  • In this paper, we present a new current-current negative feedback(CCNF) differential voltage-controlled oscillator (VCO) with 1/f induced low-frequency noise suppressed. By means of the CCNF, the 1/f induced low-frequency noise is removed from the proposed CCNF VCO. Also, high-frequency noise is stopped from being down-converted into phase noise by means of the increased output impedance through the CCNF and the feedback capacitor $C_f. The proposed CCNF VCO represents 11-dB reduction in phase noise at 10 kHz offset, compared with the conventional differential VCO. The phase noise of the proposed CCNF VCO is measured as - 87 dBc/Hz at 10 kHz offset frequency from 5.5-GHz carrier. The proposed CCNF VCO consumes 14.0 mA at 2.0 V supply voltage, and shows single-ended output power of - 12 dBm.

Design and Fabrication of Oscillator Improving Q of Inductor Using Negative Resistance (부성저항을 이용한 인덕터의 Q값 개선과 이를 이용한 발진기의 설계 및 제작)

  • 권순철;윤영섭;류원열;최현철
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2001.11a
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    • pp.218-221
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    • 2001
  • In this paper, High Q Inductor using negative resistance circuit and the ceramic inductor was designed and fabricated at 2GHz. It was Improved the inductor of Q=90 using a inductor with Q=30 added to negative resistance circuit at 2GHz. As a result, at the bias condition of 3V and 16mA, the output power and phase noise in the operation frequency 2.01GHz are 5dBm and -115.34dBc/Hz at 100kHz offset from carrier, respectively. Phase noise was improved -10dBc/Hz at 100kHz offset compared to only using ceremic inductor.

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INTRODUCTION OF NUC ALGORITHM IN ON-BOARD RELATIVE RADIOMERIC CALIBRATION OF KOMPSAT-2

  • Song, J.H.;Choi, M.J.;Seo, D.C.;Lee, D.H.;Lim, H.S.
    • Proceedings of the KSRS Conference
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    • 2007.10a
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    • pp.504-507
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    • 2007
  • The KOMPSAT-2 satellite is a push-broom system with MSC (Multi Spectral Camera) which contains a panchromatic band and four multi-spectral bands covering the spectral range from 450nm to 900nm. The PAN band is composed of six CCD array with 2528 pixels. And the MS band has one CCD array with 3792 pixels. Raw imagery generated from a push-broom sensor contains vertical streaks caused by variability in detector response, variability in lens falloff, pixel area, output amplifiers and especially electrical gain and offset. Relative radiometric calibration is necessary to account for the detector-to-detector non-uniformity in this raw imagery. Non-uniformity correction (NUC) is that the process of performing on-board relative correction of gain and offset for each pixel to improve data compressibility and to reduce banding and streaking from aggregation or re-sampling in the imagery. A relative gain and offset are calculated for each detector using scenes from uniform target area such as a large desert, forest, sea. In the NUC of KOMPSAT-2, The NUC table for each pixel are divided as HF NUC (high frequency NUC) and LF NUC (low frequency NUC) to apply to few restricted facts in the operating system ofKOMPSAT-2. This work presents the algorithm and process of NUC table generation and shows the imagery to compare with and without calibration.

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A Transimpedance Amplifier Employing a New DC Offset Cancellation Method for WCDMA/LTE Applications

  • Lee, Cheongmin;Kwon, Kuduck
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.6
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    • pp.825-831
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    • 2016
  • In this paper, a transimpedance amplifier based on a new DC offset cancellation (DCOC) method is proposed for WCDMA/LTE applications. The proposed method applies a sample and hold mechanism to the conventional DCOC method with a DC feedback loop. It prevents the removal of information around the DC, so it avoids signal-to-noise ratio degradation. It also reduces area and power consumption. It was designed in a $0.13{\mu}m$ deep n-well CMOS technology and drew a maximum current of 1.58 mA from a 1.2 V supply voltage. It showed a transimpedance gain of $80dB{\Omega}$, an input-referred noise current lower than 0.9 pA/${\surd}$Hz, an out-of-band input-referred 3rd-order intercept point more than 9.5 dBm, and an output DC offset lower than 10 mV. Its area is $0.46mm{\times}0.48mm$.

Performance Analysis of Frequency Synchronization for HDR-WPAN System (HDR-WPAN 시스템을 위한 주파수 동기 성능분석)

  • Park, Ji-Woo;Kang, Hee-Gok;Kim, Jae-Young;Oh, Chang-Heon
    • Journal of Advanced Navigation Technology
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    • v.8 no.2
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    • pp.163-168
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    • 2004
  • In this paper, we propose a frequency synchronization algorithm using characteristic of CAZAC sequence for HDR-WPAN and analyze the performance by signal constellation and EVM(error vector magnitude). The proposed frequency offset technique estimated each sample phase error of two sequences among 12 CAZAC sequences which have excellent autocorrelated characteristic. Estimated phase error is multiplied to each sample of next sequence for compensating the frequency offset. The remaining frequency offset after compensating it with two sequences has maximum 0.002 offsest ranges at each sample. The computer simulation proved that the permission of EVM value had satisfied in the case of DQPSK at 20[dB].

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A 900 MHz VCO Having 7-dB Phase Noise Improvement at 100 kHz Offset

  • Lee, Ja-Yol;Kang, Jin-Young;Oh, Seung-Hyeub
    • Journal of electromagnetic engineering and science
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    • v.4 no.3
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    • pp.107-112
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    • 2004
  • In this paper, the phase noise of 900 MHz VCO is improved using modified strip line square ring resonator. In order to demonstrate the phase noise improvement of the proposed VCO, the same circuit was manufactured using shorted-circuit resonator. In condition of the same bias current, the phase noise of the proposed VCO with modified square ring resonator is suppressed by 7 dB as - 103 dBc/Hz at 100 kHz offset compared to the conventional VCO with short-circuit resonator. From the proposed VCO, we achieved output power of - 4.8 dBm, harmonics suppression of 16 dB, and tuning bandwidth of 100 MHz. The proposed VCO consumed 5 mA at 3 V, and its size is 1.2 cm ${\times}$ 1.0 cm.