• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.06a
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• pp.1438-1441
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• 2005

To establish of standard technique of nano-length measurement in 2D plane, new AFM system has been designed. In this system, measurement uncertainty is dominantly affected by the Abbe error of XY scanning stage. No linear stage is perfectly straight; in other words, every scanning stage is subject to tilting, pitch and yaw motion. In this paper, an AFM system with minimum offset of XY sensing is designed. And XY scanning stage is designed to minimize rotation angle because Abbe errors occur through the multiply of offset and rotation angle. To minimize the rotation angle optimal design has performed by maximizing the stiffness ratio of motion direction to the parasitic motion direction of each stage. This paper describes the design scheme of full AFM system, especially about XY stage. Full range of fabricated XY scanner is $100um\times{100um}$. And tilting, pitch and yaw motion are measured by autocollimator to evaluate the performance of XY stage. Using this AFM system, 3um pitch specimen was measured. As a result, the uncertainty of total system has been evaluated.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.4A
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• pp.214-218
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• 2012

In this paper, we reported on a high performance waveguide VCO(voltage controlled oscillator) for FMCW applications. The waveguide VCO consists of a GaAs Gunn diode, a varactor diode, and two bias posts with low pass filter(LPF). The cavity is designed for fundamental mode at 47 GHz and operated at second harmonic of 94 GHz center frequency. The developed waveguide VCO has 1.095 GHz bandwidth, 590 MHz linearity with 1.69% and output power from 14.86 to 15.93 dBm. The phase noise is under -95 dBc/Hz at 1 MHz offset.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.9
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• pp.903-911
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• 2014

This paper proposes a high speed frequency synthesizer with dual phase-locked loop(PLL) structure to improve phase noise level and shape in a wideband receiver. To reduce phase noise and fractional spur, a output frequency of $1^{st}$ PLL used as reference frequency of $2^{nd}$ PLL is changed. The frequency synthesizer has been designed with 1 Hz frequency resolution using digital NCO in 6.5~8.5 GHz wide spectrum. The measured results of the fabricated frequency synthesizer show that the output power is about -3 dBm, the maximum lock-in time and phase noise are within 60 us and -95 dBc/Hz at 10 kHz offset, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.9
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• pp.30-37
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• 2000

In this paper, design and fabrication of miniature voltage-controlled oscillator(VCO) is discussed . Based on the two-port circuit analysis technique, VCO for 900MHz cellular mobile phone is designed and circuit parameters are optimized using the circuit simulator. Using the optimized design parameters, miniature VCO with 6${\times}$6${\times}$1.8 mm$^3$(0.065cc) dimensions is fabricated and experimented. Experimental results show that implemented VCO has -3.5 dBm output power level and 45MHz tunung range, respectively, and has -101.5dB/Hz Phase noise performance at 10 KHz frequency offset.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.5
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• pp.1035-1039
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• 2012

In this paper, we developed a 94 GHz waveguide VCO(voltage controlled oscillator) using a GaAs-based Gunn diode and a varactor diode. The cavity is designed for fundamental mode at 47 GHz and operated at second harmonic of 94 GHz. Bias posts for diodes operate as LPF(low pass filter) and resonator. The fabricated waveguide VCO achieves an oscillation bandwidth of 760 MHz. Output power is from 12.61 to 15.26 dBm and phase noise is -101.13 dBc/Hz at 1 MHz offset frequency from the carrier.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.6
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• pp.231-237
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• 2016

This paper presents a multiband low phase noise CMOS VCO with wide frequency tunability using switched bondwire inductor bank. The combination of bondwire inductor and CMOS switch transistor enhances frequency tunability and improves phase noise characteristics. The proposed multiband VCO operates from 2.3GHz to 6.3GHz with phase noise of -136dBc/Hz and -122dBc/Hz at 1 MHz offset frequency, respectively. Switched bondwire inductor bank shows high quality factor(Q) at each frequency band, which allows better tradeoff between phase noise and power consumption. The proposed VCO is designed in TSMC 0.18um CMOS process and consumes 7.2 mW power resulting in figure of merit(FOM) of -189.3dBc/Hz at 1 MHz offset from 6GHz carrier frequency.

• Journal of Advanced Navigation Technology
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• v.12 no.2
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• pp.122-131
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• 2008

In this paper, an S-band oscillator of the low phase noise property using miniaturized microstrip hairpin shaped ring resonator has been designed and implemented. The TACONIC's RF-35 substrate has a dielectric constant ${\varepsilon}_r$=3.5 a thickness h=20mil a copper thickness t=17 um and loss tangent $tan{\delta}$=0.0025. The designed and implemented 2.45 GHz oscillator shows low phase performance of -100.5 dBc/Hz a 100kHz offset. Output power 20.9 dBm at center frequency 2.45 GHz and harmonic suppression -32 dBc. The circuit was implemented with hybrid technique. But can be fully compatible with the RFIC's, MIC and MMIC due to its entirely planar structure.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.4
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• pp.527-536
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• 2014

In this paper, the 50kW aerogenerator which is applicable to the microgrid was designed and analyzed by using commercial simulation program Maxwell 2D. Particularly, the suggested PMSG to reduce the cogging torque introduced the offset and skew concept. The suggested optimal value of offset and skew was decided by 2mm and 60 degree of electric angle. The simulation results of the PMSG when load operation condition showed the average harmonic distortion 1.3%, voltage 322.41V, current 94.95A, and iron loss 9.73W, eddy current loss 73.68W, copper loss 3.52kW. The capacity of aerogenerator calculated 61.56kW, and the suggested design process can be applied to higher capacity generator.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.2
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• pp.122-133
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• 2013

An arbiter-based simple phase decision circuit (PDC) optimized for high-resolution phase-to-digital converter made up of an analog phase-frequency detector and a time-to-digital converter for all-digital phase-locked loops is proposed. It can distinguish very small phase difference between two pulses even though it consumes lower power and has smaller input-to-output delay than the previously reported PDC. Proposed PDC is realized using 130-nm CMOS process and demonstrated by transistor-level simulations. A 5-bit P2D having no offset nor deadzone using the PDC is also demonstrated. A harmonic-lock-free and small-phase-offset delay-locked loop for fixing the P2D resolution regardless of PVT variations is also proposed and demonstrated.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.11C
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• pp.1581-1591
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• 2004

In this paper, we investigate the design of three low-complexity joint estimation algorithms(LJEAs) for frequency offset and carrier phase. The proposed LJEAs are based on the interpolation technique of correlation values of the received signal in frequency and phase domains. With these algorithms, the estimation ranges $\Delta$f$_{d}$${\times}$T$_{s}$ . are less than 1/2N$_{s}$ , and 1/N$_{s}$ which are comparable to conventional algorithms. The Proposed LJEAs require only 2N$_{s}$ or 4N$_{s}$ complex multiplications which are very simple compared with the conventional algorithms. Nevertheless the estimation accuracies of the LJEAs are as good as those of the conventional algorithms. Suitable areas of application include joint estimation of frequency offset and carrier phase in burst-mode digital transmission such as satellite communications.