• 한국음향학회:학술대회논문집
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• 한국음향학회 1992년도 학술논문발표회 논문집 제11권 1호
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• pp.29-32
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• 1992

In this paper, a systolic array structure is derived from the realization of 2-D IIR digital filters directed from the SFG(signal flow graph). After realized the 1-D formed partial systolic array, we implemented the complete systolic array to be cascaded 1-D form. The cascading of partial systolic arrays reduce the storage element which sued to delay input signal. 1-D systolic array is derived from that DG is designed through local communication approach and then it mapping to SFG. The derived structure is very simple and has high throughput because during new imput sample is supplied, new output is obtained every sampling period. And broadcast input signal is eliminated. Since the systolic array has property of regularity, modularity, local interconnection and highly synchronized multiprocessing, thus is very suitable for VLSI implementation.

• ETRI Journal
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• 제37권5호
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• pp.877-887
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• 2015

This paper is a first-hand summary on our comprehensive live trial of cellular-assisted device-to-device (D2D) communications currently being ratified by the standards community for next-generation mobile broadband networks. In our test implementation, we employ a full-featured 3GPP LTE network deployment and augment it with all necessary support to provide realtime D2D connectivity over emerging Wi-Fi-Direct (WFD) technology. As a result, our LTE-assisted WFD D2D system enjoys the required flexibility while meeting the existing standards in every feasible detail. Further, this paper provides an account on the extensive measurement campaign conducted with our implementation. The resulting real-world measurements from this campaign quantify the numerical effects of D2D functionality on the resultant system performance. Consequently, they shed light on the general applicability of LTE-assisted WFD solutions and associated operational ranges.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.212-226
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• 2014

This paper presents the design and implementation of a pipelined architecture and a method for real-time human detection using depth image from a Time-of-Flight (ToF) camera. In the proposed method, we use Euclidean Distance Transform (EDT) in order to extract human body location, and we then use the 1D, 2D scanning window in order to extract human joint location. The EDT-based human extraction method is robust against noise. In addition, the 1D, 2D scanning window helps extracting human joint locations easily from a distance image. The proposed method is designed using Verilog HDL (Hardware Description Language) as the dedicated hardware architecture based on pipeline architecture. We implement the dedicated hardware architecture on a Xilinx Virtex6 LX750 Field Programmable Gate Arrays (FPGA). The FPGA implementation can run 80 MHz of maximum operating frequency and show over 60fps of processing performance in the QVGA ($320{\times}240$) resolution depth image.

• 터널과지하공간
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• 제30권1호
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• pp.39-62
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• 2020

본 연구에서는 불포화토의 열-수리적 변화로 야기되는 역학적 거동 특성을 분석하고 장기 거동을 예측하기 위해 Barcelona Basic Model(BBM) 해석 모듈을 TOUGH2-MP/FLAC3D에서 구동할 수 있도록 개발하였다. 기본적으로는 TOUGH-FLAC에 BBM 해석 모듈을 개발하기 위해 사용된 선행연구의 방법과 마찬가지로 FLAC에서 제공하고 있는 Modified Cam Clay Model(MCCM)을 기반으로 User Defined Model(UDM)과 FLAC3D에서 제공하는 FISH function을 이용하였다. 본 연구에서 개발한 BBM 해석 모듈에서는 평균유효응력뿐만 아니라 흡입력의 변화에 따른 소성변형률을 모두 고려하였으며, 평균유효응력 및 흡입력 증가에 따른 항복면의 변화를 모두 반영할 수 있도록 하였다. 개발된 BBM 해석 모듈을 FLAC3D 매뉴얼에 기술되어 있는 MCCM 예제, BBM을 처음 제안한 선행연구에 언급되어 있는 예제들, 그리고 스웨덴 SKB 보고서에 언급되어 있는 실험실 시험 결과를 이용하여 검증하였다. 뿐만 아니라, 효과적인 BBM의 파라미터 도출을 목적으로 개발된 Quick tools의 검증을 위해 수행된 일련의 모델링 시험들을 동일하게 수행하고 선행연구에서 보고된 Quick tools와 Code_Bright의 결과와 비교함으로써 개발된 BBM 해석 모듈을 검증하였다.

• Computers and Concrete
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• 제2권5호
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• pp.345-366
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• 2005

This work presents an assessment of the computational performance of a vector-parallel implementation of probabilistic model for concrete cracking in 3D. This paper shows the continuing efforts towards code optimization as reported in earlier works Paz, et al. (2002a,b and 2003). The probabilistic crack approach is based on the direct Monte Carlo method. Cracking is accounted by means of 3D interface elements. This approach considers that all nonlinearities are restricted to interface elements modeling cracks. The heterogeneity governs the overall cracking behavior and related size effects on concrete fracture. Computational kernels in the implementation are the inexact Newton iterative driver to solve the non-linear problem and a preconditioned conjugate gradient (PCG) driver to solve linearized equations, using an element by element (EBE) strategy to compute matrix-vector products. In particular the paper analyzes code behavior using OpenMP directives in parallel vector processors (PVP), such as the CRAY SV1 and CRAY T94. The impact of the memory architecture on code performance, and also some strategies devised to circumvent this issue are addressed by numerical experiment.

• 한국광학회:학술대회논문집
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• 한국광학회 2003년도 제14회 정기총회 및 03년 동계학술발표회
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• pp.290-291
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• 2003

Optical Coherence Tomography is a new medical dianostic imaging technology which can perform micron resolution cross-sectional or tomograpic imaging in biological tissue. In this paper, we analyze OCT system. And we have 2-dimensional OCT image implementation using low coherence SLD.

• 한국정보통신학회논문지
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• 제12권5호
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• pp.815-820
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• 2008

최근 통신용 UWB에 대한 주파수할당과 기술기준이 완료됨에 따라서 UWB 시스템에 대한 개발이 활발히 진행되고 있다. 우리나라의 경우 low band로 $3.1{\sim}4.8GHz$와 high band로 $7.2{\sim}10.2GHz$를 통신용 UWB 시스템에 할당하고 있으며, 현재의 RF 부품 기술과 제품 구현의 용이성을 고려하면 low band를 많이 이용할 것이다. 본 논문에서는 제품 구현의 용이성을 고려해서 low band를 이용하는 통신용 UWB 시스템을 위한 interdigital BPF를 설계 및 제작하였다. BPF는 low band 대역 필터와 low band 채널필터를 설계 및 제작하였다. 성능 측정 결과 low band 대역 필터는 3.1GHz와 4.8GHz에 서 각각 21.85dB와 17.91dB의 감쇠 특성을 가지며, -10dB 대역폭은 1.53GHz, 삽입 손실은 2dB이었다. Low band 대역은 500MHz 대역폭으로 3개의 채널이 할당 가능하며, 구현한 low band의 1번 채널필터는 3.1GHz에서 24.85dB의 감쇠 특성, -10dB 대역폭은 0.61GHz, 삽입 손실은 1.87dB로 측정되었다. Low band의 3번 채널필터는 4.8GHz에서 19.2dB의 감쇠특성을 가지며, 10dB 대역폭은 0.49GHz이고 2.49dB의 삽입 손실은 갖는다.

• Journal of information and communication convergence engineering
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• 제15권2호
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• pp.97-103
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• 2017

Implementation of faster pairing calculation is the basis of efficient pairing-based cryptographic protocol implementation. Generally, pairing is a costly operation carried out over the extension field of degree $k{\geq}12$. But the twist property of the pairing friendly curve allows us to calculate pairing over the sub-field twisted curve, where the extension degree becomes k/d and twist degree d = 2, 3, 4, 6. The calculation cost is reduced substantially by twisting but it makes the discrete logarithm problem easier if the curve parameters are not carefully chosen. Therefore, this paper considers the most recent parameters setting presented by Barbulescu and Duquesne [1] for pairing-based cryptography; that are secure enough for 128-bit security level; to explicitly show the quartic twist (d = 4) and sextic twist (d = 6) mapping between the isomorphic rational point groups for KSS (Kachisa-Schaefer-Scott) curve of embedding degree k = 16 and k = 18, receptively. This paper also evaluates the performance enhancement of the obtained twisted mapping by comparing the elliptic curve scalar multiplications.

• 전자공학회논문지A
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• 제31A권6호
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• pp.188-198
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• 1994

The distributed arithmetic approach has been commonly recognized as an efficient method to implement the inner-product type of computation with fixed coefficients such as DCT/IDCT. This paper presents a novel architecture and the implementation of 2-D DCT/IDCT VLSI chip based on distributed arithmetic. The main feature of the proposed architecture is a fully 2-bit serial pipeline and parallel structure with memory-based signal processing circuitry, which is efficient to the implementation of the bit-serial operation of distributed arithmetic. All modules of the proposed architecture are designed with NP-dynamic circuitry to reduce the power consumption and to increase the performance. This chip is applicable in HDTV systems working at video sampling rate up to 75 MHz.

• 한국방송∙미디어공학회:학술대회논문집
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• 한국방송공학회 1998년도 Proceedings of International Workshop on Advanced Image Technology
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• pp.79-84
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• 1998

This paper describes implementation of the core DSM-CC UU interface. It briefly describes the reference model for the DSM-CC and related standards that should be reviewed for the implementation. The Common Object Request Broker Architechture, Revision 2.0 (CORBA 2.0) is sued as a remote procedure call (RPC) scheme for the UU Interface. Entire system was implemented with C++ on Windows NT platforms. The implementation procedure has been decomposed ito two tasks. The first task is to implement the Naming Service for service navigation. The Naming Service is one of the CORBA Services that extend the core CORBA specification. A client GUI is implemented for easy navigation among various services. The second task is to construct multimedia server and client for a Video-on-Demand (VoD) system. MPEG-2 Transport Stream is transported via ATM AAL5 using the Windows Socket 2.2 ATM extension API. A GUI enables the user to navigate the service domain and select a program. After the selection the user can control the MPEG-2 stream with VCR-like buttons.