• Journal of the Institute of Convergence Signal Processing
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• v.2 no.3
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• pp.93-101
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• 2001

In this paper, we propose an image downscaler used in multimedia video applications, such as DTV, TV-PIP, PC-video, camcorder, videophone and so on. The proposed image downscaler provides a scaled image of high-quality and high-performance. This paper will explain the scaling theory using two-dimensional digital filters. It is the method that removes an aliasing noise and decreases the hardware complexity, compared with Pixel-drop and Upsamling. Also, this paper will prove it improves scaling precisians and decreases the loss of data, compared with the Scaler32, the Bt829 of Brooktree, and the SAA7114H of Philips. The proposed downscaler consists of the following four blocks: line memory, vertical scaler, horizontal scaler, and FIFO memory. In order to reduce the hardware complexity, the using digital filters are implemented by the multiplexer-adder type scheme and their all the coefficients can be simply implemented by using shifters and adders. It also decreases the loss of high frequency data because it provides the wider BW of 6MHz as adding the compensation filter. The proposed downscaler is modeled by using the Verilog-HDL and the model is verified by using the Cadence simulator. After the verification is done, the model is synthesized into gates by using the Synopsys. The synthesized downscaler is Placed and routed by the Mentor with the IDEC-C632 0.65${\mu}{\textrm}{m}$ library for further IC implementation. The IC master is fixed in size by 4,500${\mu}{\textrm}{m}$$\times$4,500${\mu}{\textrm}{m}$. The active layout size of the proposed downscaler is 2,528${\mu}{\textrm}{m}$$\times$3,237${\mu}{\textrm}{m}$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.49-59
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• 2008

SIFT(Scale Invariant Feature Transform) is an algorithm to extract vectors at pixels around keypoints, in which the pixel colors are very different from neighbors, such as vortices and edges of an object. The SIFT algorithm is being actively researched for various image processing applications including 3-D image constructions, and its most computation-intensive stage is a keypoint localization. In this paper, we develope a fixed-point model of the keypoint localization and propose its efficient hardware architecture for embedded applications. The bit-length of key variables are determined based on two performance measures: localization accuracy and error rate. Comparing with the original algorithm (implemented in Matlab), the accuracy and error rate of the proposed fixed point model are 93.57% and 2.72% respectively. In addition, we found that most of missing keypoints appeared at the edges of an object which are not very important in the case of keypoints matching. We estimate that the hardware implementation will give processing speed of $10{\sim}15\;frame/sec$, while its fixed point implementation on Pentium Core2Duo (2.13 GHz) and ARM9 (400 MHz) takes 10 seconds and one hour each to process a frame.

• Journal of Cadastre & Land InformatiX
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• v.53 no.1
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• pp.47-63
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• 2023

The Seoul Metropolitan Government is building and operating digital twin-based urban spatial information to solve various problems in the city and provide public services. Two essential factors to ensure the stable utilization of spatial information for the implementation of such a digital twin city are the latest and quality of the data. However, it is time-consuming and costly to maintain continuous updating of high-quality urban spatial information. To overcome this problem, we studied efficient urban spatial information construction technology and the operation, management, and update procedures of construction data. First, we demonstrated and applied automatic 3D building construction technology centered on point clouds using the latest hybrid sensors, confirmed that it is possible to automatically construct high-quality building models using high-density airborne lidar results, and established an efficient data management plan. By applying differentiated production methods by region, supporting detection of urban change areas through Seoul spatial feature identifiers, and producing international standard data by level, we strengthened the utilization of urban spatial information. We believe that this study can serve as a good precedent for local governments and related organizations that are considering activating urban spatial information based on digital twins, and we expect that discussions on the construction and management of spatial information as infrastructure information for city-level digital twin implementation will continue.

• Journal of Advanced Navigation Technology
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• v.19 no.6
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• pp.623-629
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• 2015

In the present study, a coplanar waveguide (CPW)-fed printed monopole antenna with an inverted n-shaped slot is newly proposed for dual band operations which cover bandwidths of CDMA (1.85~2.025 GHz) and WLAN (2.4~2.484 GHz) as well as implementation of omnidirectional radiation pattern. For enhancement of impedance bandwidth ($S11{\leq}10dB$) in 2.4 GHz WLAN frequency band, an inverted n-shaped slot instead of the previous n-shaped slot is etched on the printed radiating monopole. The proposed antenna is designed and fabricated on one side of FR4 substrate with dielectric constant of 4.4, thickness of 1.6 mm, and size of $50{\times}25mm^2$. It has been observed that the measured impedance bandwidths are 280 MHz (1.84~2.12 GHz) in frequency band of CDMA and 420 MHz (2.38~2.8 GHz) in WLAN frequency band respectively. It is noticeable that impedance bandwidth in 2.4 GHz frequency band of WLAN is enlarged to three times due to use of inverted L-shaped slot in comparison with impedance bandwidth 140 MHz (2.39~2.53 GHz) obtained by use of the previous n-shaped slot. In addition, good omnidirectional radiation patterns have been observed over the entire frequency band of interest.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.8
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• pp.714-720
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• 2009

In this paper, design and the implementation method of a band-tunable ultra-wideband planar doubler are described Microstrip-to-CPS(balun) transition and Microstrip-to-CPW transition are respectively used for input/output matching circuits for the doubler. The Input balun structure allows to apply diode bias, and the doubler output frequency is tunable by changing the diode bias voltage. With the bias voltage of -0.6 V, the measured operating frequency band of the implemented doubler is $10{\sim}20$ GHz, with the bias voltage of $-0.2{\sim}-0.4$ V, the operating frequency band is $10{\sim}30$ GHz, and with 0 V bias, the operating frequency band is $20{\sim}30$ GHz. The doubler provides conversion loss of less than 15 dB and fundamental frequency suppression of 30 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.4
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• pp.397-403
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• 2008

In this paper, the mixer was implemented in the non-radiative dielectric waveguide that is the main component of 60 GHz band radio telecommunications equipment which a demand increases for the purpose of point-to-point communication network. As to the manufacture of the non-radiative dielectric waveguide mixer, it was the implementation of the dielectric line combiner to be most difficult. The thing which that gives shape to the curvature which is the dielectric line determined and the to place in the exact interval thing are easy. For this reason, it was very difficult to make in order to have the regular performance in the case of the mixer having the dielectric line combiner. In this paper, since the dielectric line combiner was replaced with the waveguide directional coupler and the manufacture was possible through a processing it had the characteristic that a combiner is fixed. In result, the productivity of a mixer was innovatively improved. The design frequency of the mixer implemented through this paper RF and LO are $51{\sim}64\;GHz$. IF Is $DC{\sim}\;GHz2$. The down conversion loss toward the RF input of $60{\sim}62\;GHz$ was measured by $10{\pm}1\;dB$ in the condition that LO is 10 dBm, 60 GHz.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.1
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• pp.49-55
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• 2007

To improved the multi-resolution fast hierarchical motion estimation by using de-interlacing algorithm that is effective in term of both performance and VLSI implementation, is proposed so as to cover large search area field-based as well as frame based image processing in SoC design. In this paper, we have simulated a various picture mode M=2 or M=3. As a results, the proposed algorithm achieved the motion estimation performance PSNR compare with the full search block matching algorithm, the average performance degradation reached to -0.7dB, which did not affect on the subjective quality of reconstructed images at all. And acquiring the more desirable to adopt design SoC for the fast hierarchical motion estimation, we exploit foreground and background search algorithm (FBSA) base on the dual arithmetic processor element(DAPE). It is possible to estimate the large search area motion displacement using a half of number PE in general operation methods. And the proposed architecture of MHME improve the VLSI design hardware through the proposed FBSA structure with DAPE to remove the local memory. The proposed FBSA which use bit array processing in search area can improve structure as like multiple processor array unit(MPAU).

• International Journal of Highway Engineering
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• v.14 no.3
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• pp.151-162
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• 2012

It is not surprising to hear news about irresistible natural disasters all over the world due to climate change. Korean Government has focused on developing a variety of green technologies to reduce green house gasses, in particular, carbon dioxide. This study suggested 18 technology divisions for achieving green highway technology development in six different sub-sectors considering life-cycle of roadway and surveyed 29 highway and/or transportation professionals of three institutes using AHP(Analytical Hierarchy Process) analysis to construct "Green Highway"and realize carbon emission reductions and energy use efficiency in a road sector in Korea. Expert Choice Software was used to rank 18 technology divisions weighted by two-level choices. Transport Operating Infrastructure Improvement, Roadway Policy Implementation, Green Transportation(such as Pedestrian and Bicycle) were highly ranked by respondents according to results of the AHP modeling. Among the 18 divisions, technology policy for supporting R&D investments from development to commercialization was ranked as the most significant one to be focused. Green Transportation Facility Design/Construction/Operation and Eco-Friendly Roadway Plan were followed as expected since professionals have thought that the planning/design step of the life-cycle is a starting point to reduce carbon dioxide from roads more and more. Additionally, comparing the results with the Government investment trend 2006-2011 for the roads, it can be interpreted that the Government should invest to the R&D area more widely than before to promote element and core technology development for Green Highway Construction. Above all, small and mid-sized businesses have to be invested as well as encouraged to undertake green highwayrelated objects to accomplish the divisions which ranked high.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.11
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• pp.3487-3493
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• 2009

The degree of depression of dental hygienist was analyzed to reveal the various factors related to them. The self-administered between June 1st, and 30st, 2009, questionnaires were filled out from 221 dental hygienist in D City. 1.The distribution for depression degree has shown the rate as 79.1% in normal range group, 15.4% in mild depression group, 4.1% in moderate depression group and 1.4% in severe depression group, 2.As for depression, junior college, lower salary, poor sense satisfaction in work, not fit to the job, low personal relation with peer works or supervisors, poor subjective condition of health, without regular eating habits, without alcohol drinking, without regular exercise, in the group with higher level of job demand, lower job autonomy and lower supervisor support than their respective counterparts. 3.Concerning correlation between depression and various factors, while level of depression correlated with was negatively sense satisfaction, fit to the job, personal relation with peer works or supervisors, subjective condition of health, spervisor support, coworker support, it was positively correlated with job demand. Resulting from these results, in order to resolve depression properly, implementation and maintenance of program should be renewed to improve various kinds of factors.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.32 no.2
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• pp.109-115
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• 2014

The aim of the study is to present a method to build an octree and to query from it for huge 3D point clouds of which volumes correspond or surpass the main memory, based on the memory-efficient octree developed by Han(2013). To the end, the method directly refers to 3D point cloud stored in a file on a hard disk drive instead of referring to that duplicated in the main memory. In addition, the method can save time to rebuild octree by storing and restoring it from a file. The memory-referring method and the present file-referring one are analyzed using a dataset composed of 18 million points surveyed in a tunnel. In results, the memory-referring method enormously exceeded the speed of the file-referring one when generating octree and querying points. Meanwhile, it is remarkable that a still bigger dataset composed of over 300 million points could be queried by the file-referring method, which would not be possible by the memory-referring one, though an optimal octree destination level could not be reached. Furthermore, the octree rebuilding method proved itself to be very efficient by diminishing the restoration time to about 3% of the generation time.