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Deinterlacing Method for improving Motion Estimator based on multi arithmetic Architecture  

Lee, Kang-Whan (Dept. of Computer Engineering, Korea University Technology And Education)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SP / v.44, no.1, 2007 , pp. 49-55 More about this Journal
Abstract
To improved the multi-resolution fast hierarchical motion estimation by using de-interlacing algorithm that is effective in term of both performance and VLSI implementation, is proposed so as to cover large search area field-based as well as frame based image processing in SoC design. In this paper, we have simulated a various picture mode M=2 or M=3. As a results, the proposed algorithm achieved the motion estimation performance PSNR compare with the full search block matching algorithm, the average performance degradation reached to -0.7dB, which did not affect on the subjective quality of reconstructed images at all. And acquiring the more desirable to adopt design SoC for the fast hierarchical motion estimation, we exploit foreground and background search algorithm (FBSA) base on the dual arithmetic processor element(DAPE). It is possible to estimate the large search area motion displacement using a half of number PE in general operation methods. And the proposed architecture of MHME improve the VLSI design hardware through the proposed FBSA structure with DAPE to remove the local memory. The proposed FBSA which use bit array processing in search area can improve structure as like multiple processor array unit(MPAU).
Keywords
motion estimator; multiprocessor; deinterlacing; VLSI; MPEG;
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1 Kangwhan Lee, Hangyu Lee and Jinwoong Kim, 'An efficient VLSI Architecture for block matching motion estimation,' in Proc. SPIE Visual Communication and Image Processing'96, vol. 2952, pp. 575-581, 1996
2 Bo Martin and Soren Forchammer, 'A unified approach to restoration, deinterlacing and restoration enhancement in MPEG2 decoding. 'IEEE Trans. Circuit and systems for video Tech., vol. 12, no. 9, pp. 803-811, Sep. 2002   DOI   ScienceOn
3 M. Chen, C. Hung and C. Hsu, 'Efficient de-interlacing technique by inter-fieldinformation, 'IEEE Trans. Consumer Electronics, vol. 50, no. 4, pp. 1202-1208, Nov. 2004   DOI   ScienceOn
4 Kyoung Won Lim, 'Fast hierarchical search block matching algorithm by using multiple motion vector candidates, ' KAIST Thesis, 1997